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asynchronous dram controller

Abstract: 683XX M68000 MC68681 MCF5307 lfl 1.635 70953 IO162
Contextual Info: Introduction Signal Description ColdFire Core B • 9 PLL Cache SRAM Bus Operation System Integration Module Chip-Select Module Parallel Port General-Purpose I/O DRAM Controller Timer Module DMA Module UART Module M-Bus Module Debug Support IEEE 1149.1 JTAG