WOIM Search Results

Contextual Info: /T T SGS-THOMSON ^ 7#. llD M ILi sraMD(@l> M48Z58 CMOS 8K x 8 ZEROPOWER SRAM PRODUCT CONCEPT INTEGRATED LOW POWER SRAM and POWER-FAIL CONTROL CIRCUIT PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 8K x 8 SRAMs SELF CONTAINED BATTERY in the CAPHAT DIP PACKAGE

Contextual Info: ÎÊiS f ö K c O POR U S E R E V IS IO N S W IT H DESCRIPTION .1 4 1 S . R . C .- S U Ï £ M T R Y D î A M S Σ R 0 1 ft C/A T g R bLEASEO A P P R oveo ro/A/!?6 « c <i I f : í HUM ’"“n ^ ü u S i T ï ü ” CONTACT ELEC TR IC AL ’TioKKSi w.pccarvco

C3538

Abstract: c1826 2-174225-5 ADC highspeed converter AD9225-EB AD922x* datasheet AD9200SSOP-EVAL AD9203-EB MC100EP31 AD9280-EB
Contextual Info: PRELIMINARY TECHINICAL DATA High-Speed ADC FIFO Evaluation Kit a Preliminary Technical Data The evaluation kit is easy to setup. Other equipment needed includes an Analog Devices high-speed ADC evaluation board, a power supply, a signal source, and a clock source.

Contextual Info: IBM0164805B IBM0164805P P re lim in a ry 8 M x 8 13/10 ED O DRAM Features • 8,388,608 word by 8 bit organization Read-Modify-Write • Single 3.3 ± 0.3V power supply Performance: • Extended Data Out Hyper Page Mode -5 0 tRAc • CAS before RAS Refresh

20264C

Contextual Info: CELESTICA„ 8M x 72 EDO ECC UNBUFFERED DIMM FEATURES 168-pin industry standard eight-byte dual-in-line memory module JEDEC compliant: 21-C, Figure 4.5.3-A, B, F, D, N Release 7 No. 95 MO-161 High performance, CMOS Single 3.3V ± 0.3 power supply LVTTL-compatible inputs and outputs

Mullard

Contextual Info: Mullard OUTPUT PENTODE Heater This valve is suitable for DC/AC operation. Vf If = 35 V = 0.2 A Cagl < 0 . 5 CapacityOperating Conditions Va Vg2 la -Tgl Ig2 S Hi g (g2gl) W0 Ra Vgl eff Vgl eff (Wo = 50 mW) dtot Rk 100 100 50' 8 -3 9 8.5 12,000 7 2.1 2,000

Contextual Info: SN54HCT377, SN74HCT377 OCTAL D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCLS067B - NOVEMBER 1988 - REVISED JUNE 1996 Inputs Are TTL-Voltage Compatible Contain Eight Flip-Flops With Slngle-Rall Outputs Clock Enable Latched to Avoid False Clocking Applications Include:

7805L

Abstract: FTO-xx
Contextual Info: PRELIMINARY DATA SHEET CMOS INTEGRATED CIRCUIT JEC juPD42S17805L, 4217805L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, HYPER PAGE MODE Description The /iPD42S17805L, 4217805L are 2 097 152 words by 8 bits CMOS dynam ic RAMs w ith optional hyper page

240v AC voltage stabilizer schematic diagram

Abstract: C536 transistor diode C531 c531 diode transistor C535 transistor C536 transistor C546 c516 transistor C538 c537 A transistor
Contextual Info: 14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter AD9254 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AD9254 VIN+ VIN– Macro, micro, and pico cell infrastructure GENERAL DESCRIPTION The AD9254 is a monolithic, single 1.8 V supply, 14-bit, 150 MSPS analog-to-digital converter ADC , featuring a high performance

Contextual Info: High Speed ADC USB FIFO Evaluation Kit HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC FEATURES FUNCTIONAL BLOCK DIAGRAM Buffer memory board for capturing digital data Used with high speed ADC evaluation boards 32 kB FIFO Depth at 133 MSPS upgradeable to 256 kB Simplifies evaluation of high speed ADCs

wiom

Abstract: wiom DC SB156 SS101
Contextual Info: BRIIXIE RECTIFIERS 1A • 1.5A • 2A • 3A • 4A • 6A • 8A • 10A • 15A • 26A M aximum Peak Reverse V o lta ge Max A vg Rect C urrent @ H alf-W ave Res Load 60Hz M axim um Forward Peak Surge C urrent @ 8 3ms Superim posed M axim um Reverse C urrent

Contextual Info: MITSUBISHI LSIs M5M44190AJ,TP,RT-6,-7,-8,-10 FAST PAGE MODE 4 7 1 8 5 9 2 -B IT 2 6 2 1 4 4 -W O R D BY 18-BIT DYNAM IC RAM DESCRIPTION This is a fa m ily o f 2 6 2 1 4 4 -w o rd by 1 8 -b it dynam ic RAMs, fabricated w ith the high perform ance CMOS process, and

Contextual Info: THE INFORMATION CONTAINED HEREIN IS CONSIDERED 'PROPRIETARY' TO BEL FUSE INC. AND SHALL NOT BE COPIED, REPRODUCED OR DISCLOSED WITHOUT THE WRITTEN APPROVAL DF BEL FUSE INC. LED I PD LARITY PIN 21 PIN 22 CDLDR + YELLDW + GREEN — E L E C T R IC A L CHARACTERISTICS 8 25*C

120-PIN

Abstract: AD9200 AD9201 AD9280 AD9281 AD9430 AN-737 AN-835 J301 U101
Contextual Info: ADC ANALYZER USER MANUAL One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com FEATURES FUNCTIONAL BLOCK DIAGRAM Used with high speed ADC evaluation boards to simplify evaluation

Contextual Info: 14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter AD9254 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD AD9254 VIN+ Macro, micro, and pico cell infrastructure GENERAL DESCRIPTION The AD9254 is a monolithic, single 1.8 V supply, 14-bit, 150 MSPS analog-to-digital converter ADC , featuring a high performance

31L01

Contextual Info: Am31L01 / 31L01A 64-Blt Low Power Write Transparent, Inverting Output, Bipolar R A M AIÏ131L01/31L01A DISTINCTIVE CH A R ACT ER IST IC S Standard version: A ddress access time SO n s Low power: Ic e typically 75 mA Internal ECU circuitry for optimum speed/power perfor­

Contextual Info: _ PRELIMINARY DATA SHEET_ NEC / M O S INTEG RATED CIRCU IT _ / MC-428LFC72 3.3 V OPERATION 8 M-W ORD BY 72-BIT DYNAMIC RAM MODULE BUFFERED TYPE, HYPER PAGE MODE EDO Description The MC-42BLFC72 is • 8,388,808 words by 72 bit» dynamic RAM module on which B piaces of 64 M DRAM:

MML800

Abstract: cwp05
Contextual Info: High Speed Precision Comparator CMP-05 ANALOG DEVICES FEATURES • Precision Input Stag* Input OffMt Voltage. ISOmV Input OffMt Currant . 15nA • Faat Raaponsa Tima SmV Overdrive .38ns

177827-1

Abstract: LXCLL dram memory module 1993 DQ300 Hitachi DSA0088
Contextual Info: HB56AW51232D Low Power Series 524,288-Word x 32-Bit High Density Dynamic RAM Module Revl Oct. 13, 1993 The HB56AW51232D is a 512K x 32 dynamic RAM Small Outline DIMM S.O.DIMM , mounted 4 pieces of 4-Mbit DRAM (HM51W4800ALTT) sealed in TSOP package. An outline of the HB56AW51232D is 72-pin Zig

Contextual Info: THE INFORMATION CONTAINED HEREIN IS CONSIDERED 'PROPRIETARY' TO BEL FUSE INC. AND SHALL NOT BE COPIED, REPRODUCED OR DISCLOSED VITHDUT THE WRITTEN APPROVAL OF BEL FUSE INC, RoHS 2002/35/EC SCHEMATIC ELECTRICAL CHARACTERISTICS @ 25*C RJ45 TURNS RATIO TX 1CT i 1

Contextual Info: CELESTICA 1M x 72 PTY FPM BUFFERED DIMM FEATURES 168-pin industry standard 8-byte dual-in-line memory module JEDEC compliant: 21 -C, Fig. 4-13A, B, C, D, M Release 5 No. 95 MO-161 CSS, WE, OE and Address lines are buffered High performance, CMOS Single 5.0V ± 10% power supply

AD9238-20PCB

Abstract: ADC highspeed converter 2-174225-5 AD6640ST/PCB AD9200 FUNCTIONAL DIAGRAM OF 7400 IEEE 1284 graph connect male female AD9218-105PCB AD9218-65PCB AD9289BBC-65EB
Contextual Info: High Speed ADC FIFO Evaluation Kit HSC-ADC-EVAL-SC/HSC-ADC-EVAL-DC FEATURES FUNCTIONAL BLOCK DIAGRAM Buffer memory board for capturing digital data Used with high speed ADC evaluation boards Two 32K FIFOs Simplifies evaluation of high speed ADCs Measures performance with ADC Analyzer software

r4104-11

Abstract: 4 pin usb connector J306 r410411 c50450 J307 AD9240-EB adc 515 40-pin connector for LVDS lg u504 24
Contextual Info: High Speed ADC USB FIFO Evaluation Kit HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC FEATURES FUNCTIONAL BLOCK DIAGRAM Buffer memory board for capturing digital data Used with high speed ADC evaluation boards 32 kB FIFO Depth at 133 MSPS upgradeable to 256 kB Simplifies evaluation of high speed ADCs