VP2612 Search Results

Contextual Info: SEPTEMBER 1994 ADVANCE INFORMATION DS3511 - 2.2 VP2612 VIDEO MULTIPLEXER Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■

TXA13

Contextual Info: VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■ Line rates from 64kbits/s up to 2Mbits/s

Contextual Info: PBffl GEC plessey DS35H - 3.0 VP2612 VIDEO MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP 1C Handbook, HB3923-2f FEATURES • Fully integrated H261 video multiplexer M Inputs data direct from VP2611 source coder H Output to X21 line buffers

Contextual Info: P ^ p iG E C PLESSEY ADVANCE INFORMATION S E MI CONDUCT ORS DS3511 -2.2 VP2612 VIDEO MULTIPLEXER Supersedes version in December 1993 Digital Video & DSP 1C Handbook, HB3923-1 The VP2612 Video Multiplexer forms part of the GPS chip-set for video conferencing, video telephony, and

philips hd6

Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520S "Overflow detection" "TOPS"
Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ VP2612 Video Multiplexer

V2611

Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520S TXA11 data bus sytem "sub data bus"
Contextual Info: VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■ Line rates from 64kbits/s up to 2Mbits/s

Pin and function compatible VP2612

Abstract: TXA11 H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520S 16 line to 4 line coder multiplexer
Contextual Info: VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■ Line rates from 64kbits/s up to 2Mbits/s

Contextual Info: S i SEPTEMBER 1994 GEC PLESSEY S E M I C O N D U C T O R ADVANCE INFORMATION S DS3511 * 2.2 VP2612 VIDEO MULTIPLEXER Supersedes version in December 1993 Digital Video S DSP 1C Handbook, HB3923-1 FEATURES I Fully integrated H261 video multiplexer • Inputs data direct from VP2611 source coder

Contextual Info: *• 1 B »993 3 1 get pifssfy june 1993 PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3511 • 1.6 VP2612 VIDEO MULTIPLEXER FEATURES H Fully integrated H261 video multiplexer • Inputs data direct from VP2611 source coder ■ Output to X21 line buffers

STU 438

Contextual Info: ^ M ITE L VP2612 Video M ultiplexer SE M IC O N D U C T O R S u p e rs e d e s v e rs io n in J u n e 1 9 95 D igital V id e o & D S P IC H and boo k, H B 3 9 2 3 -2 FEATURES • Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■

VMUX

Contextual Info: GEC PLESSEY S E M I C O N D U C T O R S W VP2612 VIDEO MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP 1C Handbook, HB3923-2 FEATURES The VP2612 Video Multiplexer forms part of the GPS chip-set for video conferencing, video telephony, and

Contextual Info: @M ITEL VP2612 Video Multiplexer SE M IC O N D U C T O R S u p e rs e d e s v e rs io n in J u n e 1995 D igital V id e o & D S P IC H a n d b o o k, H B 3 9 2 3 -2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from V P2611 source coder

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S 16 line to 4 line coder multiplexer
Contextual Info: VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■ Line rates from 64kbits/s up to 2Mbits/s

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S "Overflow detection"
Contextual Info: VP2612 Video Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■ Output to X21 line buffers ■ Line rates from 64kbits/s up to 2Mbits/s

Contextual Info: P S G E C p l e s s e y DS3735 • 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP 1C Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

Contextual Info: VP2615 JANUARY 1996 ADVANCE INFORMATION DS3479 - 3.0 VP2615 H.261 DECODER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format

Contextual Info: VP2614 DS3735 - 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

VP510

Abstract: VP520 VP520S DS3487 H261 VP2611 VP2612 VP2614 VP2615 PAL colour coder block diagram
Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

Contextual Info: VP2615 M ITEL _ H.261 Decoder SE M IC O N D U C T O R Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format The V P2615 decoder forms part of a chip set for use in

Contextual Info: VP2611 @ M ITEL H.261 Encoder SE M IC O N D U C T O R Supersedes January 1996 edition, DS3487 - 3.0 DS3487 - 4.0 June 1996 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

BT812

Abstract: bt812 equivalent BROOKTREE bt812
Contextual Info: AN4620 Designing with the H.261 Chipset Application Note AN4620 - 1.1 November 1996 INTRODUCTION This application note has been compiled from a number of previously separate documents issued in response to specific customer requests for support or additional information about the operation and use of H.261 chips. As such the topics covered are

BT812

Abstract: bt812 equivalent CCIR601 DS3504 H261 uPD485506 VP2611 VP2612 VP520 VP520S
Contextual Info: AN4620 Designing with the H.261 Chipset Application Note AN4620 - 1.1 November 1996 INTRODUCTION This application note has been compiled from a number of previously separate documents issued in response to specific customer requests for support or additional information about the operation and use of H.261 chips. As such the topics covered are

H.261 encoder chip

Abstract: AN206 CCIR601 G711 T120 VP2611 VP2612 VP2614 VP2615 VP520
Contextual Info: AN206 An Overview of the H.261 Application Note AN206 - 1.1 October 1995 THE REQUIREMENT H.261 is an ITU recommendation concerned with providing an international standard for video codecs which will allow inter regional compatibility for video telephony. The