VLSI Search Results

Q2230

Abstract: Qualcomm an2334 Qualcomm DDS Q2520
Contextual Info: 02230 DIRECT M Gim i SYNTHESIZER • ■ Q ■ u ■ a ■ l q ■ c v ■ w ■ m I ^ » ^ ^ V T S J Products ■ O TH ER Q U ALC O M M VLSI PR O DU CTS • Dual Direct Digital Synthesizer CONTENTS PQFP PACKAGING

8-bit VGA ramdac

Abstract: VGA VESA DDC2 Composite Video to VGA decoder 640x480 50hz tv tuner for crt monitor block diagram ccir to vga converter Composite Video to VGA 6-bit ram-dac video converter tv encoder pc to tv encoder diagram
Contextual Info: W9971CF GENERAL DESCRIPTION Winbond s W9971CF is a highly-integrated VLSI providing high performance graphics acceleration and TV-quality full screen motion video acceleration for IBM PCs or compatibles. The W9971CF integrates an NTSC/PAL TV encoder with S-Video or composite video for flicker-free and glueless

32c9001

Contextual Info: SSI 32C9001 PC-AT Combo Controller With Reed Solomon, 48 Mbit/s ¿ é c m s u s k m s A TDK G roup/C om pany Advance Information January 1994 DESCRIPTION FEATURES The SSI 32C9001 is an advanced CMOS VLSI device which integrates major portions of the hardware

1N4002

Abstract: ICS1660 ICS1660M ICS1660N uA current detect 4.5V TO 100V INPUT REGULATOR
Contextual Info: ICS1660 Integrated Circuit Systems, Inc. Incoming Call Line Identification ICLID Receiver with Ring Detection Description Features The ICS1660 “ICLID” circuit is a monolithic CMOS VLSI device that decodes and detects the Frequency Shift Keying (FSK) signals used in caller identification telephone service.

ATS diagram

Abstract: Am29325
Contextual Info: Am29325 32-Bit Floating-Point Processor DISTINCTIVE CHARACTERISTICS • • Single VLSI device perform s high-speed floating-point arithm etic - Floating-point addition, subtraction, and m u ltip lic a tio n in a single clock cycle - In te rn a l a rc h ite c tu re s u p p o rts su m -o f-p ro d u cts,

intel 82310

Abstract: 82310 intel 80387sx intel 80386 motherboard,
Contextual Info: in te T 82310 Micro Channel COMPATIBLE PERIPHERAL CHIP SET • Highly Integrated VLSI Components to Implement Micro Channel Compatible Motherboard ■ Single Architectural Solution for 80386 16 MHz, 20 MHz and 25 MHz systems, and 80386SX 16 MHz Systems

Contextual Info: HONEYUIELL/SS ELEK-, MIL "□3 D e 4551072 000055b 7 f T Honeywell 't e '/ M HCS15000 Preliminary RADIATION HARDENED CMOS GATE ARRAYS FAMILY FEATURES • Radiation Hardened Series of 1.2-Micron RICMOS Gate Arrays 1Proven VLSI Design System VDS) Toolkit™

TMC2010

Abstract: TDC1010 Booth encoder 64 bit booth multiplier tsx 37 22 1N3062 AMD29510 WTL1010 wallace tree multiplier WTL-1010
Contextual Info: Hybrid Systems W W u c m\J m CORPORATION | | ^ | I CM OS 16 x 16 Multiplier/Accumulator ' DESCRIPTION The HS 1010 is a 16 x 16 parallel m u ltip lie r-a c c u m u la to r M AC . F abricated using a d v a n c e M o ly b d e n u m C M O S VLSI te c h n o lo g y , the HS 1010 is pin -fo r-p in fu n ctio n a l

TAG L7

Abstract: fpu coprocessor PR31 PR3400 PR3000A mps 1136 TAG 93
Contextual Info: PaceMips" PR3400N CPU 32-BIT RISC PROCESSOR WITH FLOATING POINT ACCELERATOR FEATURES • CPU and FPA in a monolithic VLSI package ■ 32-BIT RISC Processor PaceMips PR3000A that contains thiity-two general purpose 32-bit registers ■ On-Chip Memory Management Unit provides fast

16650 uart

Abstract: VT21702 Multi-Channel Serial Audio Interface Diagram MIDI WAVETABLE DSP AC97 MPU-401 MIDI mpu-401 interface without usb PCI game port soundblaster vlsi technology inc
Contextual Info: Advanced Computing VT2170 2 T h u n d e r B i rd 128 3D PCI Audio Accelerator OVERVIEW The VT21702 ThunderBird 128 ™ is a high performance PCI audio accelerator jointly developed by QSound Labs and VLSI Technology. It combines the most compelling 3D and music synthesis technologies available with the

8251 uart

Abstract: SERIAL CONTROLLER 8251 VNS80000 vlsi vlsi cmos circuitry VNS8000 UART 8251 VLSI Solution implement codec G.711 8251 programmable communication interface
Contextual Info: Networking Communications VIP Single-Chip VLSI ISDN Subscriber Processor OVERVIEW F E AT U R E S The VLSI ISDN Subscriber Processor VIP offers in a single device a powerful programmable engine for ISDN subscriber communications. It includes most of the circuitry

ttl crystal oscillator

Abstract: transistor substitue data book G958 PM5345 SY69952 SY69952A SY69952AZC VNS67200
Contextual Info: OC-3/STS-3 CLOCK RECOVERING TRANSCEIVER FEATURES SY69952A DESCRIPTION • A complete SONET/SDH/ATM compatible single chip Transmitter and Receiver ■ Seamless operation with PMC-Sierra PM5345, VLSI VNS67200, IgT WAC-013-B/WAC-413-A and NEC µPD98402 UNI Processors

E112

Abstract: E212 MC100E212 MC100E212FN MC100E212FNR2 MC10E212 MC10E212FN MC10E212FNR2 E212 transistor
Contextual Info: MC10E212, MC100E212 5VĄECL 3ĆBit Scannable Registered Address Driver The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to

Contextual Info: xDSL WAN Ethernet Bridge Controller M B 86976 Package • 144-pin, plastic QFP • FPT-144P-M03 ► Descrip tio n The Fujitsu MB 86976 xDSL WAN Ethernet Bridge Controller is a CMOS VLSI device designed for LAN-WAN bridging applications. It offers a high level of integration that

full subtractor using NOR gate for circuit diagram

Abstract: full subtractor circuit using nor gates AX277 2 bit full adder SIGNAL PATH DESIGNER full subtractor circuit using nand gate
Contextual Info: VITESSE SEMICONDUCT OR 30E D H '1502331 GODDeTb 5 * V T S T -M -H ! Features • VLSI Complexity: > 35,000 Gates •Very Low Power Disspation • Superior Performance: 300M Hz to 3 GHz ■High Yielding, 4 Layer Metal, VLSI Process • Choice of Operating Temperature Ranges:

Contextual Info: T M C 2242 T ïî\ Half-Band Interpolating/Decimating Digital Filter 12 Bits, 40M H z The TM C 2242 is a fix e d -c o e ffic ie n t, linear-phase half-band low -p ass d ig ita l filte r VLSI c irc u it w h ic h can also be used to halve or double a d ig ita l s ig n a l's sam ple rate. W h e n

LB28

Abstract: S200F
Contextual Info: ^ ls W j i i V lff f g / f | M13E Device DS3/DS1 MUX/DEMUX, Extended Features TXC-03303 DATA SHEET FEATURES DESCRIPTION • Multiplexes/demultiplexes 28 DS1 signals to/from a DS3 signal. The M13E CMOS VLSI device provides the functions needed to multiplex and demultiplex 28 independent DS1

Contextual Info: S150 DC to DC Converter December 1, 2000 Model: S150-053 Description The S150 Series DC to DC Converter provides small foot-print point-of-load power conditioning for advanced VLSI CMOS devices operating at low voltages. Up to 15 Ampere output includes remote sense and

AM29C33

Abstract: J-16
Contextual Info: Am 29C327 Double-Precision Floating-Point Processor FINAL DISTINCTIVE CHARACTERISTICS • • • • • H ig h -p e rfo rm a n ce d o u b le -p re c is io n flo a tin g -p o in t processor Comprehensive floating-point and integer instruction sets Single VLSI device performs single-, double-, and

APLUS

Abstract: AV0716C AV0716D AV1416D AV2116A AV2816A AVH316B AVH316C AVH316D CMOS 4548
Contextual Info: APLUS AVxx16 Series 巨華積体電路股份有限公司 GENERAL DESCRIPTION: The AVH316B, AVH316C, AVH316D, AV0716C, AV0716D, AV1416D, AV2116A, AV2816A is a single-chip synthesizing CMOS VLSI that can synthesize voice up to 3.5,7,14,21,28 seconds using APLUS qualified coding algorithm LOGPCM .

ka3 L5

Abstract: kbs 3AB 3x3 matrix MARKING 09F rgb f13 TMC2250 ka111 277 kb3
Contextual Info: TMC2250 TR w Y Matrix Multiplier 1 2 x 1 0 Bits, 4 0 M H z The TM C2250 is a flexible high-performance ninemultiplier array VLSI circuit which can execute a cascadeable 9-tap FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolution, or a 3 x 3 color space

E5CW

Contextual Info: Integrated Device Technology, Inc. 256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL' PENTIUM CPU AND VLSI WILDCAT CORE LOGIC FEATURES PRELIMINARY IDT7MPV6239 IDT7MPV6240 IDT7MPV6241 IDT7MPV6244 high-speed 16-bit IDT FCT logic, and the IDT7MPV6241/44

macrocell ecl

Abstract: 4S514
Contextual Info: HONEYWELL DIGITAL PRODUCT bb dË J 4SS14S3 0000D43 *=1 T-42-11-13 JUNE 1985 ECL GATE ARRAY HE8000 PRO DUCT DESCRIPTION The HE8000 Gate Array Figure 1 is a 250 picosecond, 8000 equivalent gate density Very Large Scale Integra­ tion (VLSI) monolithic integrated circuit built using

IR34

Contextual Info: Integrateci Circuit Systems, Inc. ICS2008A SMPTE Time Code Receiver/Generator General Description Features The ICS2008A, SMPTE Time Code R eceiver/G enerator chip, is a VLSI device designed in a low pow er CMOS process. This device provides the timing coordination for