VIEW Search Results

Contextual Info: 54AC11109, 74AC11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0066— D2957, M ARCH 1987— REVISED M ARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11109 . . . J PACKAGE 74AC11109 . . . D OR N PACKAGE TOP VIEW

tlc3741

Abstract: resistor network 104g 9 pin
Contextual Info: TLC374, TLC374Q, TLC374Y LinCMOS QUADRUPLE DIFFERENTIAL COMPARATORS SLCS118A-NOVEMBER 1983-R EVISED OCTOBER 1996 • Single- or Dual-Supply Operation D, J, N, OR PW PACKAGE TOP VIEW • Wide Range of Supply Voltages 2 V to 18 V u 10UT[ • Very Low Supply Current Drain 0.3 mA Typ

Contextual Info: 54AC11032, 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES TI0060— D2957, JULY 1987— REVISED MARCH 1990 54A C 11032 . . . J PACKAGE 74A C 11032 . . . D OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin V c c and GND Configurations to

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

SMNS405A

Abstract: cms405 CMS408 CMS406
Contextual Info: CMS405, CMS406 4 MEGABYTE CMS407, CMS408 2 MEGABYTE DRAM MEMORY CARDS SMNS405A-JUNE1991-REVISED JANUARY 1993 * Credit Card Size 85.6 mm x 54 mm x 60-PIN MEMORY CARD (CONNECTOR VIEW 3.4 mm) Single 5-V Power Supply (±5% Tolerance) * Enhanced Page Mode Operation

Contextual Info: 54AC11021,74AC11021 DUAL 4-INPUT POSITIVE-AND GATES _ D2957. JULY 1987 - REVISED APRIL 1993 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations

Contextual Info: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES D2957, JUNE 1987 - REVISED APRIL 1993 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin Vcc and GND Configuration Minimizes High-Speed Switching Noise

jl 54123

Abstract: SN64121
Contextual Info: TYPES SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS R E V IS E D D E C E M B E R 1 9 8 3 SN54221, SN54LS221 . . . J OR W PACKAGE SN74221 . . J OR N PACKAGE SN74LS221 . . D, J OR N PACKAGE TOP VIEW 1A C 1 ^ J l 6

Contextual Info: TMS28C64 65,536-BIT ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY • Organization 8K x 8 • Single 5-V Power Supply ± 10% N AND J PACKAGES (TOP VIEW } Q 1 U A 12C 2 A7C 3 Compatible with Existing 64K M O S EPRO M s. PRO M s. R O M s, and EEPR O M s

Contextual Info: UT54 ACS 153/UT54ACTS153 Radiation-Hardened Quadruple 4 to 1 Multiplexers PINOUTS FEATURES • 16-Pin D IP Top View 1.2n radiation-hardened CMOS - Latchup immune High speed Low power consumption Single 5 volt supply Available QM L Q o r V processes Flexible package

ic tl 741

Abstract: S47C256
Contextual Info: AD V A N C E INFORM ATION TM S47C256 32,768-W ORD BY 8-BIT R EAD -O N LY M EM O R Y NOVEM BER 1 9 8 5 3 2 ,7 6 8 X 8 Organization N PACKAGE TOP VIEW Fully Static (No Clocks. No Refresh) NC C 1 y j 2 Q : 27 : A12 C 2 A7 C 3 26 : All Inputs and Outputs TTL Compatible

LVC244

Contextual Info: I SN74LVC241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SGAS343 - MARCH 1994 DB, DW, OR PW PACKAGE TOP VIEW E P IC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C Typical V q HV (Output V qh Undershoot)

i486

Contextual Info: SN74BCT2141 2-WAY 8K x 18 SYNCHRONOUS CACHE DATA RAM D3613. A UG UST 1990 2-Way 8K x 18 Bit Architecture FN PACKAGE TOP VIEW Synchronous Read and Write Access at 50 MHz Clock Frequency Incorporates Burst Counter for Burst-Read (Read-Hit) Cycles or Burst-Write (Line-Fill)

d3905

Contextual Info: TL7759C SUPPLY VOLTAGE SUPERVISOR D3905. JANUARY 1991-REVISED SEPTEMBER 1991 D OR P PACKAGE TOP VIEW * Power-On Reset Generator * Automatic Reset Generation After Voltage Drop * Precision Threshold Voltage 4.55 V ±120 mV * Low Standby Current, . . 20 ^A

Contextual Info: SN74ALS233B 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS253 - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs DW OR N PACKAGE TOP VIEW • 16 Words by 5 Bits OE [ 1 FULL-1 [ 2 • Data Rates From 0 to 40 MHz • Fall-Through Ti me. . . 14 ns Typ

74ALS234

Contextual Info: SN54ALS234, SN74ALS234 64 x 4 ASYNCHRONOUS FIRST-IN FIRST OUT MEMORY 0 2 9 5 8 , OCTOBER 1 9 8 6 Asynchronous Operation S N 54A LS 234 . . . J PACKAGE S N 74A LS 234 . . . 0 OR N PACKAGE Organized as 6 4 Words of 4 Bits Management Products TOP VIEW! Data Rates from 0 to 30 MHz

Contextual Info: SN74CBT3386 10-BIT BUS-EXCHANGE SWITCH WITH EXTENDED VOLTAGE RANGE SCDS022 - MAY 1995 DB, DW, OR PW PACKAGE TOP VIEW BE [ 1 U [ 2 [ 3 [ 4 [ 5 [ 6 [ 7 [ 8 [ 9 [ 10 [ 11 VDD [ 12 1B1 1A1 1A2 1B2 2B1 2A1 2A2 2B2 3B1 3A1 description The SN74CBT3386 provides ten bits of

Contextual Info: SN74LVC540 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 • Space-Saving Package Option: Shrink Small-Outline Package DB Features EIAJ 0.65-mm Lead Pitch DB, DW, OR PW PACKAGE (TOP VIEW) • EPIC (Enhanced-Performance implanted CMOS) Submicron Process

Contextual Info: U T 5 4 A C S 151 / U T 5 4 A C T S 151 Radiation-Hardened 1 of 8 Data Selectors/Multiplexers PINOUTS FEATURES 16-Pin DIP Top View • 8-line to 1-line multiplexers can perform as -Boolean function generators, parallel-to-serial converters, and data source selectors

Contextual Info: SN54AS760, SN74ALS760, SN74AS760 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS S D A S 1 4 1 A - DE CE M B E R 1983 - REVISED JA NUARY 1995 SN54AS760. . . J PACKAGE SN74ALS760, SN74AS760. . . DW OR N PACKAGE TOP VIEW • Open-Collector Outputs Drive Bus Lines or

tms4256

Abstract: TMS4266
Contextual Info: INSTR TM4256EL9, TM4256GU9 262,144 BY 9-BIT DYNAMIC BAM MODULES 7“-ifc-23-/7 25E D SEPTEMBER 1986 — REVISED M ARCH 1968 A SIC /MEMORY 262,144 x 9 Organization TM4266EL9 . . . L SMQLE-IN-UNE PACKAGE (TOP VIEWl_ Slngla 5-V Supply (10% Tolerance)

s2599

Abstract: sn74180
Contextual Info: SN 54180, SN 74180 9 BIT ODD/EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V lS E D M A R C H 1988 SN54180 . . . J OR W PACKAGE SN74180 . N PACKAGE TOP VIEW F U N C T IO N T A B L E O UTPUTS IN P U T S Z O F H ’s A T H ODD EVEN H L H L

5bti

Contextual Info: TPS7133QPW P, TPS713 3Y M IC R O P O W ER LO W -D R O P O U T LD O V O L T A G E R E G U L A T O R S SLVS101A-FEBRUARY 1 9 9 5 - REVISED AUGUST 1995 Thermally Enhanced Surface-Mount Package (PWP) PWP PACKAGE (TOP VIEW) High-Current (500-mA) LDO Regulator

K2545

Abstract: cx 2808 tlc2652 TLC2652A D3157
Contextual Info: TLC2652, TLC2652A Advanced LinCMOS1 PRECISION CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS D3157, SEPTEMBER 1988 0008, JG, or P PACKAGE Extremely Low Offset Voltage . . 1 nV Max TOP VIEW Extremely Low Change in Offset Voltage with Temperature . . . 0.003nV/°CTyp