VDD02 Search Results

64qfn

Abstract: SITP 64-QFN XRS10L
Contextual Info: 5 4 3 2 1 SOTP0 SOTN0 34 33 SOTP1 SOTN1 TRST TDO TDI TMS TCK 5 3 4 2 1 24 29 39 56 VDDA01 VDDA02 VDDA03 VDDA04 45 46 DRACT0 DRACT1 VDD01 VDD02 VDD03 VDD04 VDD05 VDD06 VDD07 VDD08 49 48 D 11 13 15 19 35 44 54 61 D MDC MDIO 7 9 RESETB 50 HBACT/NC 51 CMUREFP

ACS8510

Abstract: ACS8520 ACS8522 ACS8530 ACS8946 GR-253
Contextual Info: ACS8946 JAM PLL Jitter Attenuating, Multiplying Phase Locked Loop, with Protection Switch, for OC-12/STM-4 and GbE ADVANCED COMMUNICATIONS Introduction FINAL Features The ACS8946 JAM PLL is a Jitter-Attenuating, Multiplying differential Phase-Locked Loop, for generating low jitter

ACS9510

Abstract: icp multiplexer 24 pin ACS8510 ACS8520 ACS8522 ACS8525 ACS8530 ACS8947T QFN48
Contextual Info: ACS8947T JAM PLL Jitter Attenuating, Multiplying Phase-Locked Loop with Automatic Input Switch and Data Resynchronization Path COMMUNICATIONS ADVANCED COMMS & SENSING Introduction FINAL Features The ACS8947T JAM PLL is a general pupose, Integer N, jitter-attenuating, differential phase-locked loop for

px 2041 DATA IMAGE

Abstract: Memory Stick pinouts Ericsson 74XX OR Nortel 7215 marking B4MS
Contextual Info: Tsi85x Product Family PowerPC Host Bridge Manual www.tundra.com The information in this document is subject to change without notice and should not be construed as a commitment by Tundra Semiconductor Corporation. While reasonable precautions have been taken, Tundra Semiconductor Corporation assumes no

Contextual Info: fax id: 3535 C Y 2 27 6 - 2 C Y 2 27 6 - 3 C Y 2 27 6 - 4 PRELIMINARY Pentium II Clock Synthesizer/Driver for Intel 82440LX Chipset with 3 or 4 DIMM and USB/IO Support of outputs available from each device, as shown in the Selec­ tor Guide. Features • M ix e d 2 .5 V and 3 .3 V o p e r a t i o n

14.318 MHz ic

Contextual Info: fax id: 3545 CY2278A Pentium and Pentium II™ Compatible Clock Synthesizer/Driver for Mobile PCs Featu res Functional Description Mixed 2.5V and 3.3V operation Complete clock solution to meet requirements of mo­ bile Pentium™ and Pentium II™ motherboards

AMD Confidential

Abstract: Ox41 lg lcd monitor circuit diagram free "error correction algorithm" atm with an eye block diagram
Contextual Info: r « PMC-Sierra, Inc. PMS3S0 s /u n i-u ltra datasheet PMC-960924 ISSUE 4 SATURN USER NETWORK INTERFACE PM5350 S/UNI-155-ULTRA SATURN USER NETWORK INTERFACE 155.52 & 51.84 MBIT/S DATA SHEET ISSUE 7: NOVEMBER 1997 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604.415.6000

oc1016

Abstract: NT FUSE LINDER Nippon capacitors
Contextual Info: D A TA SH EET PM PMC-970624 ISSUE 4 PRELIMINARY PMC-Sierra, Inc. PM4351 comet COMBINED E1/T1 TRANSCEIVER PM4351 COMET COMBINED E1/T1 TRANSCEIVER/FRAMER DATA SHEET PRELIMINARY ISSUE 4: SEPTEMBER 1998 PMC-Sierra, Inc. 105 - 8555 Baxter Place Bumaby, BC Canada V5A 4 V7 604 .415.6000

380 TVL cmos

Abstract: motorola idp
Contextual Info: DA TASHEET PM PMC-920525 ISSUE 5 PMC-Sierra, Inc. PM5371 t u d x SONET/SDH TRtBUTAR Y UNIT CROSS CONNECT PM5371 TUDX SONET/SDH TRIBUTARY UNIT CROSS CONNECTTELECOM DATA SHEET ISSUE 5: JULY 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: 83C94 10BASE-T TWISTED PAIR TRANSCEIVER Technology, Incorporated PRELIMINARY 1993 Features • Low Power CMOS Technology - 125 \iA Standby typical ■ High-speed receiver architecture minimizes Jitter

XRS10L240

Abstract: 22 pin sata female Connector SMD HEADER 5X2 10n capacitor C8051F32 SMD FET j11
Contextual Info: SOTP1 SOTN1 SOTP2 SOTN2 8 7 SOTP2 SOTN2 SOTP3 SOTN3 19 20 SOTP3 SOTN3 SORP0 SORN0 65 66 SORP0 SORN0 SORP1 SORN1 60 59 SORP1 SORN1 SORP2 SORN2 11 10 SORP2 SORN2 SORP3 SORN3 16 17 SORP3 SORN3 SITP0 SITN0 93 94 SITP0 SITN0 SITP1 SITN1 82 81 SITP1 SITN1 SIRP0

str 2105

Abstract: 20MHZ L64381 ethernet transformer 1Gbit Application Note ethernet transformer centre tap
Contextual Info: L64381 4-Port Ethernet Controller Device Technical Manual This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using production parts.

ACS8510

Abstract: ACS8520 ACS8522 ACS8530 ACS8946 GR-253 C4150 STM 125
Contextual Info: ACS8946 JAM PLL Jitter Attenuating, Multiplying Phase Locked Loop, with Protection Switch, for OC-12/STM-4 and GbE ADVANCED COMMUNICATIONS Introduction FINAL Features The ACS8946 JAM PLL is a Jitter-Attenuating, Multiplying differential Phase-Locked Loop, for generating low jitter

SRM20W116LLTT2

Abstract: SRM20W116LLTT7
Contextual Info: EPSON PF869-03 SRM20W116 LLTT2/7 1M-Bit Static RAM • • • • Super Low Voltage Operation and Low Current Consumption Access Time 120ns 1.8V / 70ns(2.7V) 65,536 Words X16-Bit Asynchtonous Wide Temperature Range DESCRIPTION The SRM20W116LLTT2/7 is a 65,536 words x16-bit asynchronous, random access memory on a monolithic

orcad

Abstract: SITP NC15 NC16 NC22 NC10 VSS08 U-136 U136 DVDD01
Contextual Info: 14 34 45 50 62 87 1 77 76 2 1 99 100 97 96 3 74 73 72 71 4 9 18 23 29 38 54 58 67 79 83 92 98 5 SOTP1 SOTN1 8 7 NC17 NC18 19 20 NC19 NC20 65 66 60 59 SORP1 SORN1 11 10 NC13 NC14 16 17 NC15 NC16 93 94 SITP SITN 82 81 NC9 NC10 B SIRP SIRN 85 84 NC11 NC12 VSS22

Contextual Info: < £ 2 P r e l im in a r y C u s t o m e r P r o c u r e m e n t S p e c if ic a t io n iL O E Z89321/371/391 1 6-B IT DIGITAL S ig n a l P r o c e s s o r s FEATURES DSP ROM K Words Part Z89321 Z89371 Z89391 OTP DSP RAM (K Words) (Words) 4 4 64* 512 512

idt5p49ee502

Abstract: VFQFPN land pattern
Contextual Info: DATASHEET VERSACLOCK LOW POWER CLOCK GENERATOR IDT5P49EE502 Description Features The IDT5P49EE502 is a programmable clock generator intended for low power, battery operated consumer applications. There are four internal PLLs, each individually programmable, allowing for up to five differrent output

80 pin simm flash programmer

Abstract: Z89323 Z89373 Z89393 Z893X3 Z893XX
Contextual Info: Z89323/373/393 16-BIT D IGITAL SIGNAL PROCESSORS P R E L I M I N A R Y PRELIMINARY CUSTOMERPROCUREMENTSPECIFICATION Z89323/373/393 16-BITDIGITAL SIGNAL PROCESSORS FEATURES DSP ROM OTP DSP RAM Device K Words (K Words) (Words) Z89323 Z89373 Z89393 8 8 64*

pcf5073h

Abstract: "GSM baseband" A1FK
Contextual Info: Philips Semiconductors Short-form preliminary specification GSM Baseband and Audio Interface BAI PCF5073 FEATURES 2. • Low power device in 0.5 micron CMOS technology for 3.0 V typical power supply The transmit path, which transforms a bitstream to analog quadrature signals for the RF devices.

Contextual Info: MX852BB0020 Ultra-Low Jitter XTAL Oscillator with Fanout ClockWorks FUSION General Description Features MX852BB0020 CMIC clock management IC is a member of the ClockWorks® FUSION family of devices that integrates the crystal, synthesizer and fanout

Contextual Info: MX852BB0030 Ultra-Low Jitter XTAL Oscillator with Fanout ClockWorks FUSION General Description Features MX852BB0030 CMIC clock management IC is a member of the ClockWorks® FUSION family of devices that integrates the crystal, synthesizer and fanout

Contextual Info: MX852EB0027 Ultra-Low Jitter XTAL Oscillator with Fanout ClockWorks FUSION General Description Features MX852EB0027 CMIC clock management IC is a member of the ClockWorks® FUSION family of devices that integrates the crystal, synthesizer and fanout

Contextual Info: DATASHEET VERSACLOCK LOW POWER CLOCK GENERATOR I DT 5 P4 9 EE5 0 2 Description Features The IDT5P49EE502 is a programmable clock generator intended for low power, battery operated consumer applications. There are four internal PLLs, each individually programmable, allowing for up to five differrent output

P09N03

Abstract: dd3saa JDS oc-192 modulator
Contextual Info: preliminary D ata S heet PMC-2000164 PM | \ | PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET ISSUE 2 ENHANCED TT1 ™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet