V7402
Abstract: V74138 V74161 TTL7482 V74169 V74273 V74157 V74163 V7410 V7442 
 
Contextual Info: VANTIS Soft Macro Reference Manual TTL Function Macros 1999 Vantis Application Center 1 TABLE OF CONTENTS Macro Name V7400 V7402 V7408 V7410 V7411 V7420 V7421 V7427 V7430 V7432 V7442 V7449 V7451 V7482 V7483 V7485 V7486 V74133 V74138 V74139 V74148 V74150 V74151
 
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Original
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V7400 
V7402 
V7408 
V7410 
V7411 
V7420 
V7421 
V7427 
V7430 
V7432 
V7402
V74138
V74161
TTL7482
V74169
V74273
V74157
V74163
V7410
V7442
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PDF
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MACH131SP-5YC-7YI
Abstract: 14051k MACH Programmer PAL 007 PAL 007 A Pal programming MACH111SP MACH211SP mach210 die Vantis macro gates 
 
Contextual Info: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
 
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Original
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5/10/12/15-ns
5/10/12/14/18-ns
MACH221 
MACH221SP 
MACH231 
MACH231SP 
MACH211 
MACH211SP 
MACH131SP-5YC-7YI
14051k
MACH Programmer
PAL 007
PAL 007 A
Pal programming
MACH111SP
MACH211SP
mach210 die
Vantis macro gates
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PDF
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MACH211SP
Abstract: mach schematic MACH111SP 
 
Contextual Info: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages
 
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Original
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5/10/12/15-ns
5/10/12/14/18-ns
MACH221SP 
MACH231 
MACH231SP 
MACH211 
MACH211SP 
MACH211SP
mach schematic
MACH111SP
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PDF
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mach210 die
Abstract: AP-Q mach schematic mach 1 family MACH Programmer PAL 007 PAL 007 A PAL 007 c Pal programming MACH111SP 
 
Contextual Info: MACH 1 and 2 CPLD Families High-Performance EE CMOS Programmable Logic FEATURES ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-performance electrically-erasable CMOS PLD families 32 to 128 macrocells 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages SpeedLocking  – guaranteed fixed timing up to 16 product terms
 
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Original
 | 
5/10/12/15-ns
5/10/12/14/18-ns
interco14,
MACH221SP 
MACH231 
MACH231SP 
MACH211 
MACH211SP 
mach210 die
AP-Q
mach schematic
mach 1 family
MACH Programmer
PAL 007
PAL 007 A
PAL 007 c
Pal programming
MACH111SP
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PDF
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HP3070
Abstract: HP 2810 teradyne tester test system 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND: -10/12/15/20 MACH5-128 MACH5-128/68-7/10/12/15 MACH5-128/104-7/10/12/15 MACH5-128/120-7/10/12/15   Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS ◆ Fifth generation MACH architecture ◆ ◆
 
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Original
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MACH5-128 
MACH5-128/68-7/10/12/15 
MACH5-128/104-7/10/12/15 
MACH5-128/120-7/10/12/15 
10Flat
16-038-PQR-1 
PQR160 
MACH5-128/XXX-7/10/12/15 
HP3070
HP 2810
teradyne tester test system
 | 
PDF
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HP3070
Abstract: MACH5 cpld amd 1c12 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND: -10/12/15/20 MACH5-128 MACH5-128/68-7/10/12/15 MACH5-128/104-7/10/12/15 Fifth Generation MACH  MACH5-128/120-7/10/12/15 Architecture DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆ ◆ Publication# 21119
 
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Original
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MACH5-128 
MACH5-128/68-7/10/12/15 
MACH5-128/104-7/10/12/15 
MACH5-128/120-7/10/12/15 
16-038-PQR-1 
PQR160 
MACH5-128/XXX-7/10/12/15 
HP3070
MACH5 cpld amd
1c12
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PDF
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Vantis macro library
Abstract: verilog code to generate square wave noforce -freeze 
 
Contextual Info: ModelSim/Vantis Tutorial Version 4.7 The ModelSim/Vantis Edition for VHDL or Verilog Simulation on PCs Running Windows 95/98 and NT ModelSim /VHDL, ModelSim /VLOG, ModelSim /LNL, and ModelSim /PLUS are produced by Model Technology Incorporated. Unauthorized copying, duplication, or other reproduction is
 
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Original
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 | 
PDF
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HP 3D6
Abstract: HP3070 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND: -10/12/15/20 MACH5-256 MACH5-256/68-7/10/12/15 MACH5-256/120-7/10/12/15 MACH5-256/104-7/10/12/15 MACH5-256/160-7/10/12/15 Fifth Generation MACH  Architecture DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆
 
 | 
 
Original
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MACH5-256 
MACH5-256/68-7/10/12/15 
MACH5-256/120-7/10/12/15 
MACH5-256/104-7/10/12/15 
MACH5-256/160-7/10/12/15 
16-038-PQR-1
PRH208 
MACH5-256/XXX-7/10/12/15 
HP 3D6
HP3070
 | 
PDF
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HP3070
Abstract: 1b13 107-2-A-12 MACH5 cpld amd 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND:-10/12/15/20 MACH5-192 MACH5-192/68-7/10/12/15 MACH5-192/104-7/10/12/15 MACH5-192/120-7/10/12/15 MACH5-192/160-7/10/12/15 Fifth Generation MACH  Architecture DISTINCTIVE CHARACTERISTICS ◆ Fifth generation MACH architecture
 
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Original
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MACH5-192 
MACH5-192/68-7/10/12/15
MACH5-192/104-7/10/12/15 
MACH5-192/120-7/10/12/15
MACH5-192/160-7/10/12/15 
16-038-PQR-1
PQR208 
MACH5-192/XXX-7/10/12/15 
HP3070
1b13
107-2-A-12
MACH5 cpld amd
 | 
PDF
 | 
2D15
Abstract: HP3070 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND:-10/12/15/20 MACH5-192 MACH5-192/68-7/10/12/15 MACH5-192/104-7/10/12/15 MACH5-192/120-7/10/12/15 MACH5-192/160-7/10/12/15 Fifth Generation MACH  Architecture DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆
 
 | 
 
Original
 | 
MACH5-192 
MACH5-192/68-7/10/12/15
MACH5-192/104-7/10/12/15 
MACH5-192/120-7/10/12/15
MACH5-192/160-7/10/12/15 
16-038-PQR-1
PQR208 
MACH5-192/XXX-7/10/12/15 
2D15
HP3070
 | 
PDF
 | 
tico 732
Abstract: ae 4b15 Quazar 0d12 mach5 320 vantis jtag schematic 
 
Contextual Info: PRELIMINARY COM’L: -7/10/12/15 IND: -10/12/15/20 The MACH5-320/MACH5LV-320 MACH5-320/120-7/10/12/15/20 MACH5-320/160-7/10/12/15/20 MACH5-320/184-7/10/12/15/20 MACH5-320/192-7/10/12/15/20 MACH5LV-320/120-7/10/12/15/20 MACH5LV-320/160-7/10/12/15/20 MACH5LV-320/184-7/10/12/15/20 MACH5LV-320/192-7/10/12/15/20
 
 | 
 
Original
 | 
MACH5-320/MACH5LV-320 
MACH5-320/120-7/10/12/15/20
MACH5-320/160-7/10/12/15/20
MACH5-320/184-7/10/12/15/20
MACH5-320/192-7/10/12/15/20 
MACH5LV-320/120-7/10/12/15/20
MACH5LV-320/160-7/10/12/15/20
MACH5LV-320/184-7/10/12/15/20
MACH5LV-320/192-7/10/12/15/20 
16-038-BGD256-1
tico 732
ae 4b15
Quazar
0d12
mach5 320
vantis jtag schematic
 | 
PDF
 | 
2A299
Abstract: HP3070 MArking 3A5 AMD CPLD Mach 1 to 5 MACH5-256 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L: -7/10/12/15 IND: -10/12/15/20 MACH5-256 MACH5-256/68-7/10/12/15 MACH5-256/120-7/10/12/15 MACH5-256/104-7/10/12/15 MACH5-256/160-7/10/12/15 Fifth Generation MACH  Architecture DISTINCTIVE CHARACTERISTICS ◆ Fifth generation MACH architecture
 
 | 
 
Original
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MACH5-256 
MACH5-256/68-7/10/12/15 
MACH5-256/120-7/10/12/15 
MACH5-256/104-7/10/12/15 
MACH5-256/160-7/10/12/15 
16-038-PQR-1
PRH208 
MACH5-256/XXX-7/10/12/15 
2A299
HP3070
MArking 3A5
AMD CPLD Mach 1 to 5
MACH5-256
 | 
PDF
 | 
5B7 Marking
Abstract: 5A10 M0 5a15 3d13 HP3070 HP 3D6 
 
Contextual Info: MACH 5 FAMILY X FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15 MACH5-384/192-7/10/12/15 MACH5LV-384/184-7/10/12/15 MACH5-384/160-7/10/12/15 MACH5LV-384/120-7/10/12/15 MACH5LV-384/192-7/10/12/15 MACH5-384/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-384/MACH5LV-384 
MACH5-384/120-7/10/12/15 
MACH5-384/192-7/10/12/15 
MACH5LV-384/184-7/10/12/15 
MACH5-384/160-7/10/12/15 
MACH5LV-384/120-7/10/12/15 
MACH5LV-384/192-7/10/12/15 
MACH5-384/184-7/10/12/15 
MACH5LV-384/160-7/10/12/15 
16-038-BGD256-1
5B7 Marking
5A10 M0
5a15
3d13
HP3070
HP 3D6
 | 
PDF
 | 
2D15
Abstract: MACH211SP aldec g2 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-320/MACH5LV-320 MACH5-320/120-7/10/12/15 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15 MACH5-320/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-320/MACH5LV-320 
MACH5-320/120-7/10/12/15 
MACH5-320/192-7/10/12/15 
MACH5LV-320/184-7/10/12/15 
MACH5-320/160-7/10/12/15 
MACH5LV-320/120-7/10/12/15 
MACH5LV-320/192-7/10/12/15 
MACH5-320/184-7/10/12/15 
MACH5LV-320/160-7/10/12/15 
16-038-BGD256-1
2D15
MACH211SP
aldec g2
 | 
PDF
 | 
| 
 
 
 | 
tico 732
Abstract: 5B12 DT114 tms 3755 5B7 Marking LV 20-P 5a7 02 ALL-07 PROGRAMMER 
 
Contextual Info: PRELIMINARY COM’L: -7/10/12/15 IND: -10/12/15/20 The MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15/20 MACH5-384/160-7/10/12/15/20 MACH5-384/184-7/10/12/15/20 MACH5-384/192-7/10/12/15/20 MACH5LV-384/120-7/10/12/15/20 MACH5LV-384/160-7/10/12/15/20 MACH5LV-384/184-7/10/12/15/20 MACH5LV-384/192-7/10/12/15/20
 
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Original
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MACH5-384/MACH5LV-384 
MACH5-384/120-7/10/12/15/20
MACH5-384/160-7/10/12/15/20
MACH5-384/184-7/10/12/15/20
MACH5-384/192-7/10/12/15/20 
MACH5LV-384/120-7/10/12/15/20
MACH5LV-384/160-7/10/12/15/20
MACH5LV-384/184-7/10/12/15/20
MACH5LV-384/192-7/10/12/15/20 
16-038-BGD256-1
tico 732
5B12
DT114
tms 3755
5B7 Marking
LV 20-P
5a7 02
ALL-07 PROGRAMMER
 | 
PDF
 | 
O2 micro
Abstract: mach 3 family 
 
Contextual Info: 1 MACH 5 FAMILY MACH  5 Family Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS ◆ Fifth generation MACH architecture ◆ ◆ ◆ ◆ ◆ ◆ Publication# 20446 Amendment/+1 Rev: D Issue Date: November 1997 MACH 5 Family ◆ — 100% routable
 
 | 
 
Original
 | 
16-038-BGD352-1
DT106 
O2 micro
mach 3 family
 | 
PDF
 | 
MC189
Abstract: 9300 4b10 2D15 marking 1A15 HP 3D6 1b61a0 MACH5-320 ae 4b15 
 
Contextual Info: MACH 5 FAMILY 1 FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-320/MACH5LV-320 MACH5-320/120-7/10/12/15 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15 MACH5-320/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-320/MACH5LV-320 
MACH5-320/120-7/10/12/15 
MACH5-320/192-7/10/12/15 
MACH5LV-320/184-7/10/12/15 
MACH5-320/160-7/10/12/15 
MACH5LV-320/120-7/10/12/15 
MACH5LV-320/192-7/10/12/15 
MACH5-320/184-7/10/12/15 
MACH5LV-320/160-7/10/12/15 
16-038-BGD256-1
MC189
9300 4b10
2D15
marking 1A15
HP 3D6
1b61a0
MACH5-320
ae 4b15
 | 
PDF
 | 
4D-13
Abstract: HP 3D6 making 5A6 3d13 3D-14 5B7 Marking i 384 
 
Contextual Info: MACH 5 FAMILY X FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15 MACH5-384/192-7/10/12/15 MACH5LV-384/184-7/10/12/15 MACH5-384/160-7/10/12/15 MACH5LV-384/120-7/10/12/15 MACH5LV-384/192-7/10/12/15 MACH5-384/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-384/MACH5LV-384 
MACH5-384/120-7/10/12/15 
MACH5-384/192-7/10/12/15 
MACH5LV-384/184-7/10/12/15 
MACH5-384/160-7/10/12/15 
MACH5LV-384/120-7/10/12/15 
MACH5LV-384/192-7/10/12/15 
MACH5-384/184-7/10/12/15 
MACH5LV-384/160-7/10/12/15 
16-038-BGD256-1
4D-13
HP 3D6
making 5A6
3d13
3D-14
5B7 Marking
i 384
 | 
PDF
 | 
| 
 
Contextual Info: 1 MACH 5 FAMILY MACH  5 Family Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆ ◆ Publication# 20446 Amendment/0 Rev: D Issue Date: August 1997 MACH 5 Family ◆ Fifth generation MACH architecture — 100% routable
 
 | 
 
Original
 | 
16-038-BGD352-1
DT106 
 | 
PDF
 | 
5D-13
Abstract: 5D14 chip Marking 3A0 7B12 
 
Contextual Info: MACH 5 FAMILY X FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-512/MACH5LV-512 MACH5-512/120-7/10/12/15 MACH5-512/192-7/10/12/15 MACH5LV-512/160-7/10/12/15 MACH5LV-512/256-7/10/12/15 MACH5-512/160-7/10/12/15 MACH5-512/256-7/10/12/15 MACH5LV-512/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-512/MACH5LV-512 
MACH5-512/120-7/10/12/15 
MACH5-512/192-7/10/12/15 
MACH5LV-512/160-7/10/12/15 
MACH5LV-512/256-7/10/12/15 
MACH5-512/160-7/10/12/15 
MACH5-512/256-7/10/12/15 
MACH5LV-512/184-7/10/12/15 
MACH5-512/184-7/10/12/15 
MACH5LV-512/120-7/10/12/15 
5D-13
5D14
chip Marking 3A0
7B12
 | 
PDF
 | 
5D-13
Abstract: 6a7 Marking cadence leapfrog O223 6b14 
 
Contextual Info: M ACH 5 FAMI LY X FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-512/MACH5LV-512 MACH5-512/120-7/10/12/15 MACH5-512/192-7/10/12/15 MACH5LV-512/160-7/10/12/15 MACH5LV-512/256-7/10/12/15 MACH5-512/160-7/10/12/15 MACH5-512/256-7/10/12/15 MACH5LV-512/184-7/10/12/15
 
 | 
 
Original
 | 
MACH5-512/MACH5LV-512 
MACH5-512/120-7/10/12/15 
MACH5-512/192-7/10/12/15 
MACH5LV-512/160-7/10/12/15 
MACH5LV-512/256-7/10/12/15 
MACH5-512/160-7/10/12/15 
MACH5-512/256-7/10/12/15 
MACH5LV-512/184-7/10/12/15 
MACH5-512/184-7/10/12/15 
MACH5LV-512/120-7/10/12/15 
5D-13
6a7 Marking
cadence leapfrog
O223
6b14
 | 
PDF
 | 
signal path designer
Abstract: Vantis macro library 
 
Contextual Info: Design Tools for UNIX Platforms • ispLSI DEVICE FITTER — Extensive Library of Design Macros — Explore Tool to Optimize Design Implementation — Compiler Settings Allow the User to Control Design Parameters — Compiler Control Options — ispTA  for Static Timing Analysis
 
 | 
 
Original
 | 
1000EA,
1000E,
2000E,
2000VL,
2000VE,
1-888-LATTICE 
signal path designer
Vantis macro library
 | 
PDF
 | 
power generator control circuit schematic
Abstract: DT114 FLEX-700 ALL-07 Feeder 12/16 mm HI-LO ALL-07 transistor K O220 PRW 200 "AND LOGIC" HP3070 
 
Contextual Info: MACH  5A Family Fifth Generation MACH Architecture UNIQUE FEATURES ◆ High Densities and I/Os — 6 Macrocell options  128 to 512  — 6 I/O options (74 to 256) — 16 – 64 output enables — Up to 5 I/O options per macrocell — Up to 6 density & I/O options for each package
 
 | 
 
Original
 | 
BGD352 
352-Pin
16-038-BGD352-1
DT106 
M002-046 
power generator control circuit schematic
DT114
FLEX-700
ALL-07
Feeder 12/16 mm
HI-LO ALL-07
transistor K O220
PRW 200
"AND LOGIC"
HP3070
 | 
PDF
 | 
PALCE22V10
Abstract: PALLV22V10 PALLV22V10Z 
 
Contextual Info: PALLV22V10 PALLV22V10Z COM'L: -7/10/15 IND: -15 IND: -25 PALLV22V10 and PALLV22V10Z Families Low-Voltage  Zero Power  24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS ◆ Low-voltage operation, 3.3 V JEDEC compatible ◆ ◆ ◆ ◆ ◆ ◆
 
 | 
 
Original
 | 
PALLV22V10 
PALLV22V10Z 
PALLV22V10
PALLV22V10Z
24-Pin
PD3024)
28-Pin
PALLV22V10-7 
PALLV22V10-10 
PALCE22V10
 | 
PDF
 |