UART SPECIFICATION Search Results

UART SPECIFICATION Result Highlights (4)

Part	Manufacturer	Description	Download
PEF24628EV1X	Rochester Electronics LLC	PEF24628 - SOCRATES Four-channel SHDSL EFM system-on-chip	PDF
HM1L52LDP242H6PLF	Amphenol Communications Solutions	Right Angle Signal Header, 60 Position Press-Fit, Specific Loading	PDF
HM1L52LDP242H2PLF	Amphenol Communications Solutions	Right Angle Signal Header, 60 Position Press-Fit, Specific Loading	PDF
CDC341DWR	Texas Instruments	1-to-8 clock driver with tight AC specification 20-SOIC 0 to 70

UART SPECIFICATION Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
MAX14830 application notes Abstract: MAX3109 UART abstract MAX14830 design of UART APP4938 Contextual Info: Maxim > Design Support > Technical Documents > App Notes > UARTs > APP 4938 Keywords: UART, Universal Asynchronous Receiver/Transmitter, single UART, dual UART, quad UART, asynchronous communications network APPLICATION NOTE 4938 Mar 24, 2011 Differences Between Maxim's Advanced UART Devices	Original	MAX3107/MAX3108) MAX3109) MAX14830) MAX3107 128-Word MAX3108 MAX3109 com/an4938 MAX14830 application notes UART abstract MAX14830 design of UART APP4938	PDF
ISPVM Contextual Info: LatticeMico UART The LatticeMico UART is a universal asynchronous receiver-transmitter used to interface to RS232 serial devices. The UART has many characteristics similar to those of the 16450 UART. To preserve FPGA resources, the LatticeMico UART is not identical to the 16450, so it is not source-codecompatible.	Original	RS232 NS16450 16-word-deep ISPVM	PDF
AVR306 Abstract: RXB8 RXB8 receiver RXB8* application UART Program Examples AT90S8515 baudrate 1451a0 IO851 1451a08 Contextual Info: AVR306: Using the AVR UART in C Features Interrupt Controlled UART • Setup and Use of the AVR UART • Code Examples for Polled and The UART generates an interrupt when the UART has finished transmitting or receiving a byte. The interrupt handling routines uses modulo 2n addressing of	Original	AVR306: AT90S8515 08/99/xM AVR306 RXB8 RXB8 receiver RXB8* application UART Program Examples AT90S8515 baudrate 1451a0 IO851 1451a08	PDF
AT90S Abstract: AT94K atmel AT94K Contextual Info: AT94K, Field Programmable System Level Integration Chip FPSLIC , UART Macros Features • UART Receiver Enable • UART Transmitter Enable • UART 9-Bit Characters Enable AT94K Introduction Atmel's AT94K UART Macros are provided to familiarize and assist customers in programming the AVR micro-controller as part of the AT94K FPSLIC product offering.	Original	AT94K, AT94K AT94K ioat94k 04/01/xM AT90S atmel AT94K	PDF
16450 UART Abstract: National Semiconductor PC16550D UART DS433 datasheet of 16450 UART uart vhdl IPIF asynchronous PC16550D vhdl 8 bit parity generator code Contextual Info: OPB 16450 UART DS433 August 18, 2004 Product Specification Introduction LogiCORE Facts This document provides the specification for the OPB Universal Asynchronous Receiver/Transmitter UART Intellectual Property (IP). The UART described in this document has been designed	Original	DS433 PC16550D com/pf/PC/PC16550D 16450 UART National Semiconductor PC16550D UART datasheet of 16450 UART uart vhdl IPIF asynchronous vhdl 8 bit parity generator code	PDF
National Semiconductor PC16550D UART Abstract: 16550 uart 16550 UART using VHDL PC16550D 16550 uart national vhdl code for 8 bit ODD parity generator National Semiconductor 16550 UART baud rate generator vhdl DS431 Contextual Info: PLB 16550 UART v1.00c DS431 (v1.0.1) November 25, 2003 Product Overview Introduction LogiCORE Facts This document provides the specification for the PLB Universal Asynchronous Receiver/Transmitter (UART) Intellectual Property (IP). The UART described in this document has been designed	Original	DS431 PC16550D com/pf/PC/PC16550D National Semiconductor PC16550D UART 16550 uart 16550 UART using VHDL 16550 uart national vhdl code for 8 bit ODD parity generator National Semiconductor 16550 UART baud rate generator vhdl DS431	PDF
16550 uart Abstract: uart 16550 XPS 16550 UART v1.00a 16450 UART 0x1008 16550 uart timing 16550 uart national and Application Note UART16550 National Semiconductor PC16550D UART uart 16450 Contextual Info: XPS 16550 UART v1.00a DS577 April 20, 2007 Product Specification Introduction LogiCORE Facts This document provides the specification for the XPS 16550 UART (Universal Asynchronous Receiver/Transmitter) Intellectual Property (IP). The XPS 16550 UART described in this document has	Original	DS577 PC16550D com/pf/PC/PC16550D 128-Bit 16550 uart uart 16550 XPS 16550 UART v1.00a 16450 UART 0x1008 16550 uart timing 16550 uart national and Application Note UART16550 National Semiconductor PC16550D UART uart 16450	PDF
bluetooth communication between two 8051 microcontroller block diagram Abstract: 8051 microcontroller interface with rs232 8051 interfacing usb philips 8051 microcontroller 8051 microcontroller interface with gps AN10339 RS-232 to usb circuit diagram 8051 philips details 8051 microcontroller pdf free download Interfacing GPS with 8051 microcontroller Contextual Info: AN10339 UART serial interface through USB evaluation board Rev. 01 — 18 February 2005 Application note Document information Info Content Keywords USB to UART, UART evaluation board, USB serial interface Abstract The operation and description of the UART serial interface through USB is	Original	AN10339 bluetooth communication between two 8051 microcontroller block diagram 8051 microcontroller interface with rs232 8051 interfacing usb philips 8051 microcontroller 8051 microcontroller interface with gps AN10339 RS-232 to usb circuit diagram 8051 philips details 8051 microcontroller pdf free download Interfacing GPS with 8051 microcontroller	PDF
Contextual Info: FT2232C Dual USB UART / FIFO I.C. 1.0 Introduction The FT2232C is the 3rd generation of FTDI’s popular USB UART / FIFO I.C. family. This device features two MultiPurpose UART / FIFO controllers which can be configured individually in several different modes. As well as a UART	Original	FT2232C FT232BM FT245BM FT2232C DS2232C	PDF
16450 UART Abstract: datasheet of 16450 UART UART using VHDL vhdl code for 8 bit ODD parity generator DS432 uart 16450 timing UART DESIGN PC16550D 16450 IPIF asynchronous Contextual Info: PLB 16450 UART v1.00c DS432 (v2.3) July 9, 2003 Product Overview Introduction LogiCORE Facts This document provides the specification for the PLB Universal Asynchronous Receiver/Transmitter (UART) Intellectual Property (IP). The UART described in this document has been designed	Original	DS432 PC16550D com/pf/PC/PC16550D 16450 UART datasheet of 16450 UART UART using VHDL vhdl code for 8 bit ODD parity generator DS432 uart 16450 timing UART DESIGN 16450 IPIF asynchronous	PDF
Contextual Info: FT2232C Dual USB UART / FIFO I.C. 1.0 Introduction The FT2232C is the 3rd generation of FTDI’s popular USB UART / FIFO I.C. family. This device features two MultiPurpose UART / FIFO controllers which can be configured individually in several different modes. As well as a UART	Original	FT2232C FT232BM FT245BM FT2232C DS2232C	PDF
baud rate generator vhdl Abstract: fifo generator xilinx spartan XILINX FIFO UART XILINX UART lite uart vhdl vhdl code for 8 bit ODD parity generator DS422 uart vhdl code fpga 2V100 UART using VHDL Contextual Info: OPB UART Lite v1.00b DS422 December 2, 2005 Product Specification Introduction LogiCORE Facts This document describes the specifications for a UART core for the On-Chip Peripheral Bus (OPB). The UART Lite is a module that attaches to the OPB. Features	Original	DS422 DS209 CR202220. baud rate generator vhdl fifo generator xilinx spartan XILINX FIFO UART XILINX UART lite uart vhdl vhdl code for 8 bit ODD parity generator uart vhdl code fpga 2V100 UART using VHDL	PDF
block diagram UART using VHDL Abstract: wishbone interface for UART LCMXO2-1200HC-4TG144C FSM VHDL interface of rs232 to UART in VHDL LFXP2-5E-5TN144C Lattice LFXP2 NS16450 RD1042 uart verilog testbench Contextual Info: WISHBONE UART November 2010 Reference Design RD1042 Introduction The Lattice WISHBONE UART provides an interface between the WISHBONE UART system bus and an RS232 serial communication channel. Figure 1 shows the major blocks implemented in the UART in non-FIFO mode. This UART reference design contains a receiver and a transmitter. The receiver performs serial-to-parallel conversion on the asynchronous data	Original	RD1042 RS232 LatticeMico32 1-800-LATTICE block diagram UART using VHDL wishbone interface for UART LCMXO2-1200HC-4TG144C FSM VHDL interface of rs232 to UART in VHDL LFXP2-5E-5TN144C Lattice LFXP2 NS16450 RD1042 uart verilog testbench	PDF
uart16550 Abstract: 16550 uart national 16550 uart UART-16550 16550 Cr2026 16550 uart timing diagram National Semiconductor PC16550D UART 17256 XILINX UART DESIGN Contextual Info: OPB 16550 UART v1.00d DS430 December 2, 2005 Product Specification Introduction LogiCORE Facts This document provides the specification for the OPB 16550 UART (Universal Asynchronous Receiver/Transmitter) Intellectual Property (IP). Core Specifics The OPB 16550 UART described in this document has	Original	DS430 PC16550D com/pf/PC/PC16550D CR202609; uart16550 16550 uart national 16550 uart UART-16550 16550 Cr2026 16550 uart timing diagram National Semiconductor PC16550D UART 17256 XILINX UART DESIGN	PDF

Contextual Info: MAX3100 LE AVAILAB SPI/MICROWIRE-Compatible UART in QSOP-16 General Description _Features The MAX3100 universal asynchronous receiver transmitter UART is the first UART specifically optimized for small microcontroller-based systems. Using an	Original	MAX3100 QSOP-16 MAX3100 16-pin RS-232, RS-485, MAX3100â	PDF
Contextual Info: MAX3100 LE AVAILAB SPI/MICROWIRE-Compatible UART in QSOP-16 General Description _Features The MAX3100 universal asynchronous receiver transmitter UART is the first UART specifically optimized for small microcontroller-based systems. Using an	Original	MAX3100 QSOP-16 MAX3100 16-pin RS-232, RS-485, MAX3100â	PDF
Intec Automation Abstract: sdr sdram DDR SDRAM Controller White Paper MC13192 MCF5207 MCF5207CAG166 MCF5207CVM166 MCF5208 MCF5208CAB166 MCF5208CVM166 Contextual Info: ColdFire Embedded Controllers Specification Sheet MCF5207 and MCF5208 PLL BDM 4-ch., 32-bit Timer 10/100 FEC GPIO JTAG I2C 16-ch DMA UART QSPI UART UART Optional Additional Module 8 KB I/D Cache eMAC MCF520x Features MCF5207 and MCF5208 Block Diagram DMA	Original	MCF5207 MCF5208 32-bit 16-ch MCF520x MCF5208SPECFS Intec Automation sdr sdram DDR SDRAM Controller White Paper MC13192 MCF5207CAG166 MCF5207CVM166 MCF5208 MCF5208CAB166 MCF5208CVM166	PDF
EZ80F92 Abstract: hyperterminal Z180 Z80 Contextual Info: Application Note Software UART for the eZ80F91 MCU AN015303-0608 Abstract This Application Note describes an implementation of a software-emulated Universal Asynchronous Receiver/Transmitter UART for Zilog’s eZ80F91 8-bit microcontroller unit (MCU). Software UART implementation is useful for applications where an extra UART is required in addition	Original	eZ80F91 AN015303-0608 eZ80AcclaimPlus! RS-232 AN0153-SC01 eZ80Acclaim! EZ80F92 hyperterminal Z180 Z80	PDF
AVR306 Abstract: Uart applications AT90S8515 1451B Contextual Info: AVR306: Using the AVR UART in C Features • • • • Setup and Use of the AVR UART Code Examples for Polled and Interrupt Controlled UART Compact Code C Code Included for AT90S8515 Description This application note describes how to set up and use the UART present in most AVR	Original	AVR306: AT90S8515 1451B AVR306 Uart applications AT90S8515	PDF
ASK transmitter and receiver pair Abstract: circuit diagram of rf transmitter and receiver 26C198 SC26C198 SC26C198A1A SC26C198C1A Contextual Info: • bfc.53*124 0 M 4 3 C n b?3 « S I C 3 Philips Semiconductors Data Communications Products Preliminary specification Octal universal asynchronous receiver/transmitter UART DESCRIPTION SC26C198 • Sixteen byte receiver FIFOs for each UART The Philips 26C198 Octal UART Is a single chip CMOS-LSI	OCR Scan	0CH43 SC26C198 26C198 bb53T24 00T431D ASK transmitter and receiver pair circuit diagram of rf transmitter and receiver SC26C198 SC26C198A1A SC26C198C1A	PDF
oscilloscope service manual Abstract: PC Oscilloscope Probe N5423A Contextual Info: RS-232/UART Triggering and Hardware-Based Decode N5457A for Agilent InfiniiVision Oscilloscopes Data Sheet Find and debug intermittent errors and signal integrity problems faster Features: • RS-232/UART serial bus triggering • RS-232/UART hardware-based	Original	RS-232/UART N5457A) RS-232 5989-7832EN oscilloscope service manual PC Oscilloscope Probe N5423A	PDF
16750 UART texas instruments Abstract: vhdl code for fifo and transmitter uart 16750 verilog code for 8 bit fifo register uart 16750 baud rate vhdl code for 8 bit parity generator vhdl code for 8 bit shift register parallel to serial conversion verilog verilog code for baud rate generator vhdl code for binary data serial transmitter Contextual Info: D16750 Configurable UART with FIFO ver 2.20 OVERVIEW The D16750 is a soft Core of a Universal Asynchronous Receiver/Transmitter UART functionally identical to the TL16C750. The D16750 allows serial transmission in two modes: UART mode and FIFO mode. In FIFO	Original	D16750 D16750 TL16C750. 16750 UART texas instruments vhdl code for fifo and transmitter uart 16750 verilog code for 8 bit fifo register uart 16750 baud rate vhdl code for 8 bit parity generator vhdl code for 8 bit shift register parallel to serial conversion verilog verilog code for baud rate generator vhdl code for binary data serial transmitter	PDF
lin uart protocol Abstract: N5423A Contextual Info: RS-232/UART Triggering and Hardware-Based Decode N5457A for Agilent InfiniiVision Oscilloscopes Data Sheet Find and debug intermittent errors and signal integrity problems faster Features: • RS-232/UART serial bus triggering • RS-232/UART hardware-based	Original	RS-232/UART N5457A) RS-232 5989-7832EN lin uart protocol N5423A	PDF
16650 uart Abstract: uart 16650 timing vhdl code for fifo and transmitter D16950 test bench verilog code for uart 16550 uart 16750 baud rate "flow control" verilog code for 8 bit shift register baud rate generator vhdl verilog code for uart communication in fpga block diagram UART using VHDL Contextual Info: D16950 Configurable UART with FIFO ver 1.02 OVERVIEW The D16950 is a soft core of a Universal Asynchronous Receiver/Transmitter UART functionally identical to the OX16C950. The D16950 allows serial transmission in two modes: UART mode and FIFO mode. In FIFO	Original	D16950 D16950 OX16C950. 16650 uart uart 16650 timing vhdl code for fifo and transmitter test bench verilog code for uart 16550 uart 16750 baud rate "flow control" verilog code for 8 bit shift register baud rate generator vhdl verilog code for uart communication in fpga block diagram UART using VHDL	PDF

UART SPECIFICATION Search Results

UART SPECIFICATION Result Highlights (4)

UART SPECIFICATION Datasheets Context Search

MAX14830 application notes

ISPVM

AVR306

AT90S

16450 UART

National Semiconductor PC16550D UART

16550 uart

bluetooth communication between two 8051 microcontroller block diagram

16450 UART

baud rate generator vhdl

block diagram UART using VHDL

uart16550

Intec Automation

EZ80F92

AVR306

ASK transmitter and receiver pair

oscilloscope service manual

16750 UART texas instruments

lin uart protocol

16650 uart