TXLN15 Search Results

Contextual Info: VDDA T 3.3V ~ 9 r T 1.8V or 3.3V VDD 1r ~9r T ~9r T -9 r VDDPLL VDD VDDPLL VDD IOVDD VDD T TxCLKIN TxlN31 TxlN30 TxlN29 TxlN28 TxlN27 TxlN26 TxlN25 TxlN24 TxlN23 TxlN22 TxlN21 TxlN20 TxlN19 TxlN18 TxlN17 < 3.3V 1r TxlN16 TxlN15 TxlN14 TxlN13 TxlN12 TxlN11

RXOUT16

Contextual Info: CDR/PLL TxCLKIN RxCLKOUT High-Speed Serial Data 100Q differential pairs TxOUTO+ TxINO RxlN0+ OooooCj TxOUTO TxOUT1 + TxlN15 TxlN16 TxOUTI - RxINO RxlN1 + OooooCi fix TxOUT2 TxOUT3+ BIST PDB R_FB BISTEN MODE VSEL PRE . . . . • ‘ TxOUT3 - Pre-Emp Tx - SERIALIZER

L2888

Contextual Info: + July 1997 National Semiconduc 0 r D S 9 0C R 21 3/D S 9 0C R 2 1 4 2 1 - B it C h a n n e l L i n k — 66 M H width, which provides a system cost savings, reduces con­ nector physical size and cost, and reduces shielding require­ ments due to the cable’s smaller form factor.

LC 7011

Abstract: ds1008
Contextual Info: + October 1998 DS90CF384A/DS90CF364A +3.3V LVDS Receiver 24-Bit Flat Panel Display FPD Link— 65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link— 65 MHz General Description Features The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec

JAE UT3

Abstract: l449 ds90
Contextual Info: + O C/3 May 1998 National <£> Semiconductor o O tn DS90C383/DS90CF384 +3.3V P r o g r a m m a b le LVDS Transm itter 24-Bit Flat Panel Display FPD) Link — 65 MHz, +3.3V LVDS R eceiv er 24-Bit Flat Panel Display (FPD) Link — 65 M H z O W 00 CO a C/5

Contextual Info: DS92LV3241 ,DS92LV3242 DS92LV3241 /DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer/ Deserializer T exa s In s t r u m e n t s Literature Number: SNLS314C t Semiconductor September 17, 2009 DS92 LV3241/DS92 LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

DS90CR215

Abstract: DS90CR215MTD DS90CR216 DS90CR216MTD MTD48
Contextual Info: S e m i c o n d u c t o r DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link— 66 MHz General Description The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS Low Voltage Differential Signaling data streams. A phase-locked transm it clock is transmitted in

27 MHZ rc transmitter

Abstract: 27 MHZ circuit transmitter DS90CF561 DS90CF561MTD DS90CF562 DS90CF562MTD MTD48 DS90CFS61
Contextual Info: National Semiconductor DS90CF561/DS90CF562 LVDS 18-Bit Color Flat Panel Display FPD Link General Description The DS90CF561 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted

DS01288

Abstract: 24bit-color
Contextual Info: Semiconductor DS90C383/DS90CF384 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display FPD Link— 65 MHz, +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link— 65 MHz Block Diagram s Application HOST GRAPHICS LCD PANEL CONTROLLER CONTROLLER

Contextual Info: M arch 1999 DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz General Description The D S90C R285 tra n sm itte r converts 28 bits o f C M O S /TTL data into fo u r LVDS Low Voltage D ifferential Signaling data stream s. A phase-locked transm it clock is transm itted in par­