TXIN36 Search Results

Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support

DS90CR482

Abstract: DS90CR483 DS90CR484 DS90CR485 DS90CR486 PRBS-15 termination sense
Contextual Info: DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams

Contextual Info: DS90CR485 www.ti.com SNLS143D – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps Check for Samples: DS90CR485 FEATURES DESCRIPTION • • • • • • • • • • • The DS90CR485 serializes the 24 LVCMOS/LVTTL

A7p marking code

Contextual Info: DS90CR485 www.ti.com SNLS143D – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps Check for Samples: DS90CR485 FEATURES DESCRIPTION • • • • • • • • • • • The DS90CR485 serializes the 24 LVCMOS/LVTTL

Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support

an1108

Abstract: reciver
Contextual Info: DS90CR486 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Literature Number: SNLS149B DS90CR486 133MHz 48-Bit Channel Link Deserializer (6.384 Gbps) General Description The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of

Myson b27

Abstract: CS5830 TxIN10 TXIN23 HSYNC, VSYNC, DE, input, output TXIN36
Contextual Info: CS5830 Dual Pixel LVDS Display Interface LDI Transmitter GENERAL DESCRIPTION FEATURES The CS5830 converts 48 bits (Dual pixel 24-bit color) of CMOS/TTL data into 8 LVDS (Low Voltage Differential Signalling) data streams. Control signals (VSYNC, HSYNC, DE and two user-defined signals)

termination sense

Abstract: DS90CR482 DS90CR484 DS90CR485 DS90CR486 PRBS-15
Contextual Info: DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams

SNLS143C

Contextual Info: DS90CR485 DS90CR485 133MHz 48-bit Channel Link Serializer [6.384 Gbps] Literature Number: SNLS143C DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8

1108 D16

Abstract: DS90CR481 DS90CR483 DS90CR484 DS90CR485 DS90CR486
Contextual Info: DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps General Description The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of LVCMOS/LVTTL data. Using a 133MHz clock, the data throughput is 6.384Gbit/s (798Mbytes/s).

Contextual Info: DS90CR485 www.ti.com SNLS143D – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps Check for Samples: DS90CR485 FEATURES DESCRIPTION • • • • • • • • • • • The DS90CR485 serializes the 24 LVCMOS/LVTTL

Contextual Info: Channel Link Demonstration Kit N Channel Link Demonstration Kit User Manual P/N CLINK3V48BT-112 Rev 2.2 Interface Products Information contained in this document is subject to change National Semiconductor Corporation Interface Products LIT# CLINK3V48BT-112-UM

pinhead

Abstract: CAP100P E68080 LVDS 26 pin connector cable 26-MINI pin out mdr 50 pin CONNECTOR MDR connector AN-1041 0891a mdr-26 cable
Contextual Info: Channel Link Demonstration Kit National Semiconductor Channel Link Demonstration Kit Rev 2.0 Interface Products Information contained in this document is subject to change National Semiconductor Corporation Interface Products LIT# CLINK3V48BT-112 Date 01/17/00

MDR 26 pin MINI D ribbon

Abstract: mdr-26 cable MDR 20 pin MINI D ribbon MDR 68 pinout marking a6p transistor a1m DS90CR484 CLINK3V48BT-112 DS90CR483 MDR connector
Contextual Info: Channel Link Demonstration Kit N Channel Link Demonstration Kit User Manual P/N CLINK3V48BT-112 Rev 2.1 Interface Products Information contained in this document is subject to change National Semiconductor Corporation Interface Products LIT# CLINK3V48BT-112-UM

PRBS-15

Contextual Info: DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams

Contextual Info: DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in

MDR 26 pin plug

Abstract: idc connector MDR 68 pinout sumitomo ribbon cable connectors 3m mdr male pcb MDR 26 pin MINI D ribbon MDR 26 pin sumitomo ribbon cable MDR 26 pin MINI D wiring mdr-26 cable
Contextual Info: Channel Link Demonstration Kit N Channel Link Demonstration Kit Rev 2.0 Interface Products Information contained in this document is subject to change National Semiconductor Corporation Interface Products LIT# CLINK3V48BT-112 Date 01/17/00 Page 1 of 28 Channel Link Demonstration Kit

LVDS 30 pin cable

Abstract: 1108 D16 DS90CR481 DS90CR483 DS90CR484 DS90CR485 DS90CR486
Contextual Info: DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps General Description The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of LVCMOS/LVTTL data. Using a 133MHz clock, the data throughput is 6.384Gbit/s (798Mbytes/s).

DS90CR482

Abstract: DS90CR483 DS90CR484 DS90CR485 DS90CR486 PRBS-15 d13 e1
Contextual Info: DS90CR485 133MHz 48-bit Channel Link Serializer 6.384 Gbps General Description The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams

VS100A

Abstract: AN1108 E1-D15 DS90CR481 DS90CR483 DS90CR484 DS90CR485 DS90CR486 E1-D13
Contextual Info: ご注意：この日本語データシートは参考資料として提供しており内容 が最新でない場合があります。製品のご検討およびご採用に際 しては、必ず最新の英文データシートをご確認ください。

marking a6p

Abstract: a7p marking MDR 26 pin MDR 26 pin MINI D ribbon MDR 68 pinout IDC CONNECTOR 50 pin male MDR 26 pin MINI D wiring MDR connector CLINK3V48BT-112 DS90CR483AVJD
Contextual Info: Channel Link Demonstration Kit N Channel Link Demonstration Kit User Manual P/N CLINK3V48BT-112 Rev 2.2 Interface Products Information contained in this document is subject to change National Semiconductor Corporation Interface Products LIT# CLINK3V48BT-112-UM

Contextual Info: DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer 6.384 Gbps Check for Samples: DS90CR486 FEATURES 1 • • • • • • 2 • • • • • Up to 6.384 Gbps Throughput 66MHz to 133MHz Input Clock Support