TTL DIODE Search Results

BASIC step 1

Contextual Info: Precision Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1 2 TTL CONTROL #2

Contextual Info: Precision Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1 2 TTL CONTROL #2

4816

Contextual Info: Precision Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1 2 TTL CONTROL #2

Contextual Info: Precision Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1 2 TTL CONTROL #2

HLT28

Abstract: HT28 KLT28 KT28 MC100ELT28 MC10ELT28 MC10ELT28D
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator Description • • • • • • • • • • 3.5 ns Typical PECL to TTL Propagation Delay 1.2 ns Typical TTL to PECL Propagation Delay PNP TTL Inputs for Minimal Loading

Contextual Info: IDT74GTLP816 GTLP / TTL 1:2 / 1:6 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE GTLP/TTL 1:2/1:6 CLOCK DRIVER FEATURES: • • • • • • • • DESCRIPTION: 5V or 3.3V operation Interface between GTLP and TTL logic levels GTLP to TTL 1:6 fanout TTL to GTLP 1:2 fanout

XEL28

Abstract: marking k8 diode
Contextual Info: 5V TTL-TO-DIFFERENTIAL PECL AND DIFFERENTIAL PECL-TO-TTL TRANSLATOR FEATURES SY10ELT28 SY100ELT28 FINAL DESCRIPTION • Guaranteed AC parameters over temperature: • fMAX > 160MHz TTL • < 5.5ns PECL-to-TTL propagation delay • < 1.5ns tr / tf; PECL output

Contextual Info: Precision TOAT-R512+ TOAT-R512 Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1

Contextual Info: Precision TOAT-3610+ TOAT-3610 Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1

Contextual Info: Precision TOAT-3610+ TOAT-3610 Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1

Contextual Info: TOAT-124+ TOAT-124 Precision Digital Step Attenuator 50Ω TTL Control, Pin Diode Maximum Ratings Operating Temperature -55°C to 100°C Storage Temperature -55°C to 125°C Input Power 15 dBm DC Voltage 5.5 V TTL 5.5V Pin Connections RF IN 4 RF OUT 11 TTL CONTROL #1

KLT28

Abstract: HLT28 HT28 KT28 MC100ELT28 MC10ELT28 transistor k 4110
Contextual Info: MC10ELT28, MC100ELT28 5V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

klt28

Abstract: MC10ELT28 HLT28
Contextual Info: MC10ELT28, MC100ELT28 5 V TTL to Differential PECL and Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL Positive ECL levels are used, only +5 V and ground are

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-

Contextual Info: * SYNERGY LOW-POWER HEX TTL-TO-PECL TRANSLATOR SY100S391 SEMICONDUCTOR DESCRIPTION FEATURES Operates from a single +5V supply Differential PECL outputs The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique

Contextual Info: * LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be

DTL or TTL integrated logic circuits

Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0.0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V -2 .0 0.4 90 440 TO-86 6A.9A 9595* Dual ECL-TTL Translator +5.0 -5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

75450APC

Abstract: 9109 DC fairchild ECL 75450a
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0 .0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V - 2 . 0 0.4 90 440 TO-86 6A.9A 9 5 9 5 * Dual ECL-TTL Translator +5.0 - 5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver

75452ATC

Abstract: 75452A
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0.0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V -2 .0 0.4 90 440 TO-86 6A.9A 9595* Dual ECL-TTL Translator +5.0 -5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

754538

Abstract: 9109 DC 55450B 75450BDC
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0 .0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V - 2 .0 0.4 90 440 TO-86 6A.9A 9595* Dual ECL-TTL Translator +5.0 - 5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0.0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V -2 .0 0.4 90 440 TO-86 6A.9A 95 9 5 * Dual ECL-TTL Translator +5.0 -5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

55450B

Abstract: 75451B
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0 .0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V - 2 .0 0.4 90 440 TO-86 6A.9A 9595* Dual ECL-TTL Translator +5.0 - 5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

74 TTL PACKAGE OUTLINES

Abstract: 75451ATC 1606B 55451A 75451ARC
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0 .0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V - 2 .0 0.4 90 440 TO-86 6A.9A 9595* Dual ECL-TTL Translator +5.0 - 5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver 15 to 21

75450apc

Abstract: 10125 ecl to ttl fairchild 9112 7S45 pin diagram for all 74 series ttl gates
Contextual Info: INTERFACE SELECTION GUIDE BY DEVICE NUMBER HLDTL-TTL Hex 12 to 20 0.0 0 .0 0.4 120 380 TO-86 6A.9A 9112* TTL-HLDTL Hex 12 to 20 0.0 +V - 2 . 0 0.4 90 440 TO-86 6A.9A 9 5 9 5 * Dual ECL-TTL Translator +5.0 - 5 .2 2.4 0.4 6.0 375 6B TTL-MOS Quad Clock Driver