TTL DECODER Search Results
TTL DECODER Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| TC4511BP | Toshiba Electronic Devices & Storage Corporation | CMOS Logic IC, BCD-to-7-Segment Decoder, DIP16 | Datasheet | ||
| 74HC4051FT | Toshiba Electronic Devices & Storage Corporation | CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC | Datasheet | ||
| TC7MBL3257CFT | Toshiba Electronic Devices & Storage Corporation | Quad 1-of-2 Multiplexer/Demultiplexer, SPDT, TSSOP16, -40 to 85 degC | Datasheet | ||
| TC7PCI3212MT | Toshiba Electronic Devices & Storage Corporation | 2 Differential Channel, 2:1 multiplexer/demultiplexer, SPDT, TQFN20, -40 to 85 degC | Datasheet | ||
| TC7SB3157DL6X | Toshiba Electronic Devices & Storage Corporation | Single 1-of-2 Multiplexer/Demultiplexer, SPDT, MP6D, -40 to 85 degC | Datasheet |
TTL DECODER Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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SN7401
Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
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24-leadsn74s474sn54s475sn74s475+16 | |
7SEG COM ANODE
Abstract: 7-seg 7-seg ANODE COMMON 7seg D143 TTL 74LS48 TTL 7446 decoder 74LS48 7448 decoder decoder 74LS47
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74ls4874ls491-of-1054ls/74ls47+15 | |
decoder 7448
Abstract: BCD D147 D142 7448 decoder mos 9368 decoder 74LS47 7-seg 9317C ttl 74ls48 9317B
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74ls4874ls499317b9317c+12 | |
Manchester block diagramContextual Info: FAST TTL Manchester Decoder Module The FAST TTL Manchester Decoder Modules manufactured by Engineered Components Company are designed to accept a TTL Manchester encoded data stream at a given bit rate and output the recovered clock signal and the original data signal. Manchester data with a rising edge in the center of the bit period will interpreted as a “1” and |
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mol-10fmdm-ttl-11fmdm-ttl-12fmdm-ttl-13+7 | |
Manchester block diagramContextual Info: FAST TTL Manchester Decoder Module The FAST TTL Manchester Decoder Modules manufactured by Engineered Components Company are designed to accept a TTL Manchester encoded data stream at a given bit rate and output the recovered clock signal and the original data signal. Manchester data with a rising edge in the center of the bit period will interpreted as a “1” and |
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del-10fmdm-ttl-11fmdm-ttl-12fmdm-ttl-13+7 | |
TTL LS 7400
Abstract: 74 LS 00 Logic Gates Advanced Schottky Family 4 bit barrel shifter LS 00 Logic Gates ls 7400 7400 ls 74lsxxx TTL 7400 LS TTL family characteristics
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ttl ls 740074 ls 00 logic gatesadvanced schottky family4 bit barrel shifter+6 | |
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Contextual Info: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing. |
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sg60r4 | |
ITT401AC
Abstract: SOIC-14
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itt401acsoic-14 | |
y6 smd transistor
Abstract: y4 smd y1 smd transistor e2 smd transistor smd code Y1 si 4460 SMD Transistor Y6 transistor smd Y2 Y1 smd 5962F9853501VEC
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acts138msmil-prf-3853525micron100mev/+10 | |
j934Contextual Info: SP8T Switch with Direct TTL Control and Single Positive Supply ITTS801AR FEATURES • • • • • ADVANCED INFORMATION TSSOP24 Single Positive Supply 8V Direct TTL input On-Chip Decoder Logic Low Power Consumption Non-Reflective Ports DESCRIPTION MAXIMUM RATINGS (T |
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itts801artssop24tssop-24j934 | |
signal path designerContextual Info: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency |
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/d1203-0589signal path designer | |
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Contextual Info: ACTS138MS Semiconductor Radiation Hardened TTL Input, 3-to-8 Line Decoder/Demultiplexer December 1997 Features Description • QM L Qualified Per MIL-PRF-38535 Requirements The Radiation Hardened ACTS138MS is an Inverting 3-to-8 Line Decoder/Demultiplexer with three TTL level binary |
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acts138msmil-prf-3853525micron2390nm+2 | |
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Contextual Info: SP4T Switch with Direct TTL Control and Single Positive Supply ITTS401AC FEATURES • • • • • ADVANCED INFORMATION SOIC 14 Single Positive Supply +8V Direct TTL input On-Chip Decoder Logic Low Power Consumption Non-Reflective Ports DESCRIPTION MAXIMUM RATINGS (T |
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itts401acsoic-1427ref10ref+4 | |
DP LED 714
Abstract: Numeric Display with Logic 4N57 BCD-to-Seven-Segment CD640
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62-mm300-inch625-inchcom/catalog/4n57/4n57+5 | |
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Contextual Info: P54/74FCT3139A/C 3.3V SSOP QSOP NOTEBOOK LOGIC 3.3 VOLT HIGH-SPEED DUAL 1-OF-4 DECODER FEATURES • Function and Drive Compatible with the Fastest TTL Logic Edge-rate Control Circuitry for Significantly Improved Noise Characteristics ■ Inputs and Outputs Interface with TTL Logic |
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p54/74fct3139a/c40mhz2000cedt3139 | |
TIL311
Abstract: hexadecimal display Binary to hexadecimal display driver TIL311 equivalent application til311 D1176 SODS001D hexadecimal led display driver TEXAS 16 PIN led display hexadecimal driver
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til31162-mm300-inchods001d+9 | |
NC7SC19
Abstract: Marking Code m sc70-6 NL7SZ19 NL7SZ19DFT1
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nl7sz19nl7sz19/dnc7sc19marking code m sc70-6+1 | |
manchester decoderContextual Info: 1553 Manchester Decoder data series: MAD>8783 20 MBAUD delay \ë ;' devices} inc. Specifications: • Completely TTL buffered. ■ Output fan-out: Fast Schottky TTL loads. ■ Operating temperature: O'C to 70 C (-55 C to +125°C on request). ■ Temperature coefficient: 100 PPM/ C. |
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manchester decoder | |
JD 1801 PIN DIAGRAM
Abstract: R/Detector/"Detector IC"/"CD"/JD 1801 PIN DIAGRAM
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p54/74fct3138c/dae1601-2jd 1801 pin diagramr/detector/"detector ic"/"cd"/jd 1801 pin diagram | |
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Contextual Info: JUN i 5 »9? P54/74FCT3138C/D 3.3 VOLT HIGH SPEED 1-OF-8 DECODER FEATURES • Function and Drive Compatible with the Fastest TTL Logic ■ Inputs and Outputs Interface with TTL Logic Levels ■ 3.3V ± 0.2V Pow er Supply and CMOS for Lowest Power Dissipation |
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p54/74fct3138c/dfct3138fct3138toil-std-883 | |
mad85-10Contextual Info: mchester Decoder SERIES: MAD-85 14 pins DIP TTL Interfaced data Vjga delay \q devices^mi e. Features: • TTL input & outputs. ■ 14 pins DIP. ■ Data Rates to 25 MB/S. ■ Self Syncronizing within one BIT time. A pp licatio n : ■ Local Area Network LAN interfaces. |
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mad-85mad-85-1mad-85-2mad-85-3+7 | |
PDC01088A
Abstract: TCSWM-16-45 TCSWM-16R-45 TCSWM-18-45 TCSWM-18R-45 TCSWM-18RA-45
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tcswm-18-45tcswm-16-45tc-4520-lead+5 | |
Bus Interfaces
Abstract: AD851
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mad-85mad-85-1ad-85-1bus interfaces+1 | |
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Contextual Info: intei 8205 HIGH SPEED 1 OUT OF 8 BINARY DECODER I/O Port or Memory Selector Simple Expansion — Enable Inputs High Speed Schottky Bipolar Technology — 18ns Max. Delay Directly Compatible with TTL Logic Circuits Low Input Load Current — .25 mA max., 1 /6 Standard TTL Input Load |
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16-pin | |