TRUTH TABLE AND GATE 74 Search Results

ttl 74ls10

Abstract: truth table NOT gate 74 74LS10 74LS10 truth table 751A-02 SN54-74LS10 74LS10 TTL 3 input nand gate 74LS10
Contextual Info: SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN

truth table 74ls54

Abstract: 4 inputs OR gate truth table 751A-02 74Ls54 SN74LSXXD SN54LSXXJ SN74LSXXN truth table NOT gate 74 3-2-2-3-input AND-OR-invert gate
Contextual Info: SN54/74LS54 3-2-2-3-INPUT AND-OR-INVERT GATE 3-2-2-3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

H4-16

Contextual Info: 74LCX125 Low-voltage CMOS quad bus buffer 3-state with 5 V tolerant inputs and outputs Datasheet − production data Features • 5 V tolerant inputs and outputs ■ High speed – tPD = 5.2 ns (max) at VCC = 3 V ■ Power-down protection on inputs and outputs

74LVQ02

Abstract: 74LVQ02M 74LVQ02MTR 74LVQ02TTR TSSOP14
Contextual Info: 74LVQ02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ86

Abstract: 74LVQ86M 74LVQ86MTR 74LVQ86TTR TSSOP14
Contextual Info: 74LVQ86 QUAD EXCLUSIVE OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LCX02

Abstract: 74LCX02M 74LCX02MTR 74LCX02TTR TSSOP14
Contextual Info: 74LCX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED : tPD = 4.4ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LCX86

Abstract: 74LCX86M 74LCX86MTR 74LCX86TTR TSSOP14
Contextual Info: 74LCX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED : tPD = 6.5ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LCX00

Abstract: 74LCX00M 74LCX00MTR 74LCX00TTR TSSOP14
Contextual Info: 74LCX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED : tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LVX132

Abstract: 74LVX00 74LVX132M 74LVX132MTR 74LVX132TTR TSSOP14
Contextual Info: 74LVX132 LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 5.9ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C TYPICAL HYSTERESIS : 0.7V at VCC = 3.3V

74LVX02

Contextual Info: 74LVX02 LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE . HIGH SPEED: tPD = 4.5 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at Ta = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

74LVX86

Contextual Info: 74LVX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE . HIGH SPEED: tPD = 5.8 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

74LVX00

Abstract: 74LVX00M 74LVX00MTR 74LVX00TTR TSSOP14
Contextual Info: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX27

Abstract: 74LVX27M 74LVX27MTR 74LVX27TTR TSSOP14
Contextual Info: 74LVX27 LOW VOLTAGE CMOS TRIPLE 3-INPUT NOR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX32

Abstract: 74LVX32M 74LVX32MTR 74LVX32TTR TSSOP14
Contextual Info: 74LVX32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.4ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LS164 PIN DIAGRAM

Abstract: 74LS164 LS164 4 inputs OR gate datasheet 4 inputs OR gate truth table 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS164 SERIAL-IN PARALLEL-OUT SHIFT REGISTER The SN54 / 74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift Register. Serial data is entered through a 2-Input AND gate synchronous with the LOW to HIGH transition of the clock. The device features an asynchronous

74LCX125

Abstract: 74LCX125MTR 74LCX125TTR TSSOP14
Contextual Info: 74LCX125 LOW VOLTAGE CMOS QUAD BUS BUFFER 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 5.2 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

74LVC00AMTR

Abstract: 74LVC00A 74LVC00AM 74LVC00ATTR TSSOP14
Contextual Info: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LVQ20

Abstract: 74LVQ20M 74LVQ20MTR 74LVQ20TTR TSSOP14
Contextual Info: 74LVQ20 DUAL 4-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.3 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVC86A

Abstract: 74LVC86AM 74LVC86AMTR 74LVC86ATTR TSSOP14
Contextual Info: 74LVC86A LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V

74LVQ11

Abstract: 74LVQ11M 74LVQ11MTR 74LVQ11TTR TSSOP14
Contextual Info: 74LVQ11 TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.7ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LX1G32

Abstract: 74LX1G32CTR 74LX1G32STR SC70-5
Contextual Info: 74LX1G32 LOW VOLTAGE CMOS SINGLE 2-INPUT OR GATE WITH 5V TOLERANT INPUT • ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.7ns MAX. at VCC = 3V LOW POWER DISSIPATION: ICC = 1µA (MAX.) at TA = 25°C POWER DOWN PROTECTION ON INPUTS AND OUTPUTS

74LX1G03

Abstract: SOT23-5L 74LX1G03CTR 74LX1G03STR
Contextual Info: 74LX1G03 SINGLE 2-INPUT OPEN DRAIN NAND GATE • ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns MAX. at VCC = 3V LOW POWER DISSIPATION: ICC = 1µA (MAX.) at TA = 25°C POWER DOWN PROTECTION ON INPUTS AND OUTPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 5.5V

Contextual Info: Æ T S G S -T H O M S O N D lsi S IILICTIs! iD©S 74LVQ00 QUAD 2-INPUT NAND GATE . HIGH SPEED: tPD = 5.5 ns (TYP.) at V c c = 3.3V . COMPATIBLE WITH TTL OUTPUT . LOW POWER DISSIPATION: Ice = 2 |xA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at V c c = 3.3V

Contextual Info: Æ T SGS-THOMSON D lsi S IILICTIs! iD©S 74LVQ86 QUAD EXCLUSIVE OR GATE . HIGH SPEED: tPD = 5.5 ns (TYP.) at V c c = 3.3V . COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at V c c = 3.3V