TRANSMISSION GATE IC Search Results

Contextual Info: Datasheet General Purpose CMOS Logic IC Single 2-Input NOR Gate BU4S01G2 General Description Key Specifications The BU4S01G2 consist of one independent 2-input NOR gate. An inverter-based buffer is incorporated at the gate output to improve I/O transmission characteristics, and it

Contextual Info: Datasheet General Purpose CMOS Logic IC Single 2-Input OR Gate BU4S71G2 General Description Key Specifications The BU4S71G2 consist of single 2-input OR gate. Also, because a buffer with the inverter is added to the gate output, the I/O transmission characteristic is improved,

Contextual Info: Datasheet General Purpose CMOS Logic IC Single 2-Input AND Gate BU4S81G2 General Description Key Specifications The BU4S81G2 consist of single 2-input AND gate. Also, because a buffer with the inverter is added to the gate output, the I/O transmission characteristic is improved,

27mhz remote control IC

Abstract: LC7151 pir 325 DIP18 LC7150 pin diagram of ic 7815 pir 325 application ic 7815 pin diagram 10.24MHZ D4SB
Contextual Info: Ordering number:ENN2365B CMOS IC LC7151 C MOS Si Gate IC Meeting FCC 10-Channel Standard PLL for Cordless Telephone Functions Package Dimensions • On-chip PLL for transmission/reception. • On-chip digital unlock detector. only PLL for transmission • 5.0kHz/4.4kHz output pins for guard tone.

27mhz remote control IC

Abstract: pir 325 pin diagram of ic 7815 DIP18 LC7150 LC7151
Contextual Info: Ordering number:ENN2365B CMOS IC LC7151 C MOS Si Gate IC Meeting FCC 10-Channel Standard PLL for Cordless Telephone Functions Package Dimensions • On-chip PLL for transmission/reception. • On-chip digital unlock detector. only PLL for transmission • 5.0kHz/4.4kHz output pins for guard tone.

Contextual Info: Datasheet General Purpose CMOS Logic IC Single Schmitt Trigger Inverter Gate BU4S584G2 General Description Key Specifications The BU4S584G2 consist of single schmitt trigger inverter. Also, because a buffer with the inverter is added to the gate output, the I/O transmission characteristic is

CH26A

Contextual Info: Rev 0; 10/07 3.3V 26-Channel, Three-Stateable Transmission Gate Features The DS3690 is a 26-channel, three-stateable transmission gate designed for transparent digital signal transfer when enabled and fast-gated bus isolation when the device is disabled. Each of the 26 independent channels can be used for input, output, or I/O signal applications, with a typical signal propagation delay of less

CH26A

Abstract: CH02A CH05A CH11b DS3690 CH06B CMOS Transmission gate Specifications CH24B
Contextual Info: Rev 0; 10/07 3.3V 26-Channel, Three-Stateable Transmission Gate Features The DS3690 is a 26-channel, three-stateable transmission gate designed for transparent digital signal transfer when enabled and fast-gated bus isolation when the device is disabled. Each of the 26 independent channels can be used for input, output, or I/O signal applications, with a typical signal propagation delay of less

10110F

Abstract: 50J2 850C
Contextual Info: 10110 Gate Dual 3-Input/3-Output OR Gate Line Driver Product Specification ECL Products DESCRIPTION The 10110 is a Dual 3-lnput/3-Output OR Gate intended to drive up to three transmission lines simultaneously. This feature makes the device particularly useful in dock distribution applications.

BU4081B

Abstract: BU4081BF BU4081BFV SSOP-B14
Contextual Info: Standard ICs Quad 2-input AND gate BU4081B / BU4081BF / BU4081BFV The BU4081B, BU4081BF, and BU4081BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input / output transmission speed, and an

BU4081B

Abstract: BU4081BF BU4081BFV SSOP-B14
Contextual Info: Standard ICs Quad 2-input AND gate BU4081B / BU4081BF / BU4081BFV The BU4081B, BU4081BF, and BU4081BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input / output transmission speed, and an

Contextual Info: Standard ICs Quad 2-input AND gate BU4081B/BU4081BF/BU4081BFV The BU4081B, BU4081BF, and BU4081 BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input/output transmission speed, and an

Contextual Info: Standard ICs Quad 2-input AND gate BU4081B/BU4081BF/BU4081BFV The BU4081B, BU4081BF, and BU4081 BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input/output transmission speed, and an

Contextual Info: SANYO SEMICONDUCTOR CORP 1E E » T P liV U V b UüüdüHü 7 - 7 5 -07-q o LC7150 CMOS Silicon Gate LSI 1634D PLL Synthesizer for Cordless Telephone Use Functions . On-chip PLL for transmission/reception , On-chip digital unlock detector only PLL for transmission

10111F

Abstract: 10111N lt 8217
Contextual Info: 10111 Gate Dual 3-lnput/3-O utput NOR G ate Line Driver Product Specification ECL Products DESCRIPTION The 10111 is a Dual 3-lnput/3-Output NOR Gate intended to drive up to three transmission lines simultaneously. The ability to control three parallel lines

mc10212

Abstract: SE648
Contextual Info: MC10212 MOTOROLA HIGH SPEED DUAL 3-INPUT 3-OUTPUT OR/NOR GATE HIGH SPEED DUAL 3-INPUT 3-OUTPUT OR/NOR GATE The MC10212 is designed to drive up to six transmission lines simultaneously. The multiple outputs of this device also allow the wire "OR"-ing of several levels of gating for minimization of gate

Contextual Info: TC4001BP/BF/BFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4001BP,TC4001BF,TC4001BFT TC4001B Quad 2 Input NOR Gate The TC4001B is 2-input positive NOR gate, respectively. Since the outputs of these gates are equipped with the buffers, the input/output transmission characteristics have been

IC - TC4001BP

Contextual Info: TC4001BP/BF/BFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4001BP,TC4001BF,TC4001BFT TC4001B Quad 2 Input NOR Gate The TC4001B is 2-input positive NOR gate, respectively. Since the outputs of these gates are equipped with the buffers, the input/output transmission characteristics have been

Contextual Info: TC4001BP/BF/BFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4001BP,TC4001BF,TC4001BFT TC4001B Quad 2 Input NOR Gate The TC4001B is 2-input positive NOR gate, respectively. Since the outputs of these gates are equipped with the buffers, the input/output transmission characteristics have been

Contextual Info: TC4001BP/BF/BFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4001BP, TC4001BF, TC4001BFT TC4001B Quad 2 Input NOR Gate The TC4001B is 2-input positive NOR gate, respectively. Since the outputs of these gates are equipped with the buffers, the input/output transmission characteristics have been

la 7830

Abstract: 9374 LC7151 LC715 LC7150 3007A-DIP18 DIP18 7830 equivalent 885D
Contextual Info: Ordering num ber: EN 2365B I SANYO i CMOS LSI L C 7 1 5 1 N0.2365B C MOS Si Gate LSI Meeting FCC 10-Channel Standard PLL for Co r d le s s T eleph o n e Functions : . On-chip PLL for transmission/reception . On-chip digital unlock detector only PLL for transmission

Contextual Info: Analog, Mixed Signal and Power Management MC33816 Engine control IC with smart gate control Applications • Automotive 12 V , truck and industrial (24 V) powertrain • Diesel and gasoline direct injection • Transmission • Solenoid and valve acutation applications

MC33816

Abstract: PC33816AE pre-drivers engine injection controller 98ASA00237D 12 cylinder fuel injection
Contextual Info: Analog, Mixed-Signal and Power Management MC33816 Applications • Automotive 12 V , truck and industrial (24 V) Powertrain • Diesel and gasoline direct injection • Transmission • Solenoid and valve actuation applications Automotive Engine Control IC with Smart Gate Control

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 3-lnput/3-Ouput NOR Gate MC10111 The MC10111 is designed to drive up to three transmission lines simul­ taneously. The multiple outputs of this device also allow the wire “OFT-ing of several levels of gating for minimization of gate and package count.