TRANSISTOR 3055 DATA SHEET Search Results

transistor Amp 3055

Abstract: hall effect sensor 4 pin 452 hall sensor 9v 3 pin MH002A SENSOR HALL 452 sip 3 hall sensor 80 L UGN3055U UGS3055U open drain in hall effect sensor SENSOR HALL 452
Contextual Info: DISCONTINUED PRODUCT Shown for Reference Only 3055 Data Sheet 27680 3055 MULTIPLEXED TWO-WIRE HALL EFFECT SENSOR IC MULTIPLEXED TWO-WIRE HALL-EFFECT SENSOR ICs The UGN3055U Hall-effect sensor is a digital magnetic sensing IC capable of communicating over a two-wire power/signal bus. Using a

transistor Amp 3055

Abstract: chrysler ic MH002A hall effect current sensor ic 4 wired UGN3055U UGS3055U Sprague Hall Effect Allegro Hall-Effect ICs EH00
Contextual Info: 3055 Data Sheet 27680 3055 MULTIPLEXED TWO-WIRE HALL EFFECT SENSOR IC MULTIPLEXED TWO-WIRE HALL-EFFECT SENSOR ICs DISCONTINUED PRODUCT Shown for Reference Only The UGN3055U Hall-effect sensor IC is a digital magnetic sensing IC capable of communicating over a two-wire power/signal bus. Using a

3 PIN hall effect sensor

Abstract: 4 pin hall sensor hall effect sensor 4 pin transistor Amp 3055 "Hall Effect Sensor" 3055 transistor 4 pin package hall sensor 80 L hall effect sensor can bus automotive chrysler ic
Contextual Info: 3055 3055 Data Sheet 27680 MULTIPLEXED TWO-WIRE HALL-EFFECT SENSOR IC MULTIPLEXED TWO-WIRE HALL-EFFECT SENSOR ICs The UGN3055U Hall-effect sensor is a digital magnetic sensing IC capable of communicating over a two-wire power/signal bus. Using a sequential addressing scheme, the device responds to a signal on the

motorola HEP cross reference

Abstract: EPT 4045 KPT23 motorola HEP 320 cross reference vef 202 manual KEP52 MC10EP016 HEP 801 hep51 HEP64
Contextual Info: BR1513/D Rev. 2, Apr-2001 ECLinPS Plus Device Data ECLinPS Plus Device Data Advanced ECL in Picoseconds BR1513/D Rev. 2, Apr–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved” ECLinPS, ECLinPS Lite, and ECLinPS Plus are trademarks of Semiconductor Components Industries, LLC.

100EP14

Contextual Info: MC100EP14 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver The MC100EP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or

MC10EP01

Abstract: EP01 MC100EP01 KEP01
Contextual Info: MC10EP01, MC100EP01 3.3V / 5V ECL 4-Input OR/NOR Description The MC10EP01 is a 4−input OR/NOR gate. The device is functionally equivalent to the EL01 device, LVEL01, and E101 a quad version . With AC performance much faster than the LVEL01 device, the EP01 is ideal for applications requiring the fastest AC

E131

Abstract: MC100EP131 MC10EP131 QFN32
Contextual Info: MC10EP131, MC100EP131 3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets. The device is an expansion of the E131 with differential common clock and individual clock enables.

A1870

Contextual Info: SY10EP33V/SY100EP33V 5V/3.3V, 4GHz, ÷4 PECL/LVPECL Divider Precision Edge General Description The SY10/100EP33V is an integrated ÷4 divider. The VBB pin, an internally-generated voltage supply, is ECL Pro available to this device only. For single-ended input

MC100EP142

Abstract: MC10EP142 QFN32 JEDEC qfn tray
Contextual Info: MC10EP142, MC100EP142 3.3 V / 5 V ECL 9−Bit Shift Register The MC10EP/100EP142 is a 9−bit shift register, designed with byte-parity applications in mind. The MC10/100EP142 is capable of performing serial/parallel data into serial/parallel out and shifting in

HEP05

Abstract: KEP05 MC100EP05 MC10EP05 KP05
Contextual Info: MC10EP05, MC100EP05 3.3V / 5V ECL 2-Input Differential AND/NAND Description The MC10/100EP05 is a 2−input differential AND/NAND gate. The device is functionally equivalent to the EL05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

MARKING CODE D3B

Contextual Info: MC10EP101, MC100EP101 3.3V / 5VĄECL Quad 4-Input OR/NOR The MC10/100EP101 is a Quad 4–input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the

transistor k81

Abstract: SY100EP33VKG SY100EP33VZC SY100EP33VZCTR SY10EP33VKC SY10EP33VKCTR SY10EP33VZC SY10EP33VZCTR EP-33
Contextual Info: SY10EP33V/SY100EP33V 5V/3.3V, 4GHz, ÷4 PECL/LVPECL Divider Precision Edge General Description The SY10/100EP33V is an integrated ÷4 divider. The VBB pin, an internally-generated voltage supply, is ECL Pro available to this device only. For single-ended input

HEP58

Abstract: MC100EP58 MC10EP58
Contextual Info: MC10EP58, MC100EP58 3.3V / 5VĄECL 2:1 Multiplexer The MC10/100EP58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the EL58 and LVEL58 devices. The 100 Series contains temperature compensation. • 310 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical

EP14

Abstract: MC100EP14 MC100EP14DT MC100EP14DTR2
Contextual Info: MC100EP14 3.3V / 5VĄ1:5 Differential ECL/PECL/HSTL Clock Driver The MC100EP14 is a low skew 1–to–5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or

EP01

Abstract: MC100EP01 MC10EP01 HEP01
Contextual Info: MC10EP01, MC100EP01 3.3V / 5VĄECL 4-Input OR/NOR The MC10EP01 is a 4–input OR/NOR gate. The device is functionally equivalent to the EL01 device, LVEL01, and E101 a quad version . With AC performance much faster than the LVEL01 device, the EP01 is ideal for applications requiring the fastest AC

MC100EP101

Abstract: MC100EP101FA MC100EP101FAR2 MC10EP101 MC10EP101FA MC10EP101FAR2
Contextual Info: MC10EP101, MC100EP101 3.3V / 5VĄECL Quad 4-Input OR/NOR The MC10/100EP101 is a Quad 4–input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the

KEP11

Abstract: HEP11 KP11 MC100EP11 MC10EP11 EP11 LVEL11
Contextual Info: MC10EP11, MC100EP11 3.3V / 5V ECL 1:2 Differential Fanout Buffer Description The MC10/100EP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the LVEL11 device. With AC performance much faster than the LVEL11 device, the EP11 is ideal

HEP08

Abstract: HP08 MC100EP08 MC10EP08
Contextual Info: MC10EP08, MC100EP08 3.3V / 5V ECL 2-Input Differential XOR/XNOR Description The MC10/100EP08 is a differential XOR/XNOR gate. The EP08 is ideal for applications requiring the fastest AC performance available. The 100 Series contains temperature compensation.

HEP58

Contextual Info: MC10EP58, MC100EP58 3.3V / 5VĄECL 2:1 Multiplexer The MC10/100EP58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the EL58 and LVEL58 devices. The 100 Series contains temperature compensation. • 310 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical

KEP31

Abstract: HEP31 MC100EP31 MC10EP31 HEP3 100EP31
Contextual Info: MC10EP31, MC100EP31 3.3V / 5VĄECL D Flip-Flop with Set and Reset The MC10/100EP31 is a D flip–flop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster than the EL31 and LVEL31

100EP

Abstract: EP14 MC100EP14
Contextual Info: MC100EP14 3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver The MC100EP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or

KP35

Abstract: MC100EP35 code KP35 KEP35 EL35 HP35 MC100 MC10EP35
Contextual Info: MC10EP35, MC100EP35 3.3V / 5VĄECL JK Flip-Flop The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip–flop. The J/K data enters the master portion of the flip–flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is

MC100EP35

Contextual Info: MC10EP35, MC100EP35 3.3V / 5VĄECL JK Flip Flop The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip flop. The J/K data enters the master portion of the flip flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is

Contextual Info: MC10EP101, MC100EP101 3.3V / 5VĄECL Quad 4-Input OR/NOR The MC10/100EP101 is a Quad 4–input OR/NOR gate. The device is functionally equivalent to the E101. With AC performance faster than the E101 device, the EP101 is ideal for applications requiring the