TNU 175 Search Results

pa 17105-1

Contextual Info: n m m n v iB in r REVISIONS —BRBWUM— RELEASED PER 9 7 -4 6 5 7 -0 1 2 w-i-w TS JW AD ;3 5PACE5 a 2.54 » 7.62 [.100] [.3003 A A IIUUüJNii MAILHJAL; t!ILRMOPLAÜI i C, COLOR-NA I URAL. A CONTACT FINISH: .0012?-.00254 I. 000050-.000100] NICKEL UNDERPLATE ALL OVER, .0007G [.0000301 GOLD PLATE IN

FF100R12KS4

Contextual Info: Technische Information / technical information FF100R12KS4 IGBT-Module IGBT-modules 62mm C-Serien Modul mit schnellem IGBT2 für hochfrequentes Schalten 62mm C-Series module with the fast IGBT2 for high-frequency switching *+ , -) ./0 , 4 5 6 •8 5 9 :

TXC-2 OSC

Abstract: 13fd7 txc 20.0 PEB2466H-V2.2-T/txc-
Contextual Info: NCR92C122 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUMS Symbol Parameter Minimum Maximum Units °C Ta Ambient Temperature 70 Ts Storage Temperature -55 125 °c VDD Supply Voltage -0.5 7.0 V V in Input Voltage -0.5 VDD + 0.5 Output Voltage -0.5 VUD + 0.5 V V

se5021

Abstract: 2N3444 2N744 2N3606 PE5025 MPSH30 transistor 2N5134 cl-001 2N3252 2n3600
Contextual Info: This Material Copyrighted By Its Respective Manufacturer NATL SEniCOND 6501130 Sfl {DISCRETE} NATL SEMICOND, ÏËJhSD113D DISCRETE 2 8C 0ID353âS 35388 0/ << £ ti z 'a £« St'S y — œ u< <»'—£ûrEç * £Û u - y f > g CN CO CD — s n< O O c n c

Contextual Info: NCR92C120 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUMS Symbol ta Ts Vdd V in VoUT tl Parameter Am bient Tem perature Storage Tem perature Supply Voltage Input Voltage O utput Voltage Lead Tem perature Soldering 10 seconds maximum Minimum Maximum 70 125 7.0

MC68HC805C4

Abstract: MC68HSC05C4 68HC805 749u MC68HC05C4 MC68HC05C8 MC68 PC721 MC68HC05C2 motorola sf qfp
Contextual Info: ;I ,SPi,d I l,;M’l MC68HCOXP JIDT[lb MOTOROLA MC68HC05C4 Advance 8Mb 749U~=r~l-9 lnforma tion MC68HC05C2 MC68HSC05C4 MC68HC05C3 MC68HSC05C8 MC68HC05C8 MC68HC805C4 MC68HC705C8 [11 [2 [3) [41 [51 61 [71 (8] [91 [10) [11 pd?.yxb [2) ROM+z .+7’)b–*> Y?&A

MB1430

Abstract: 1431a MB1430A MB1431A 8202 dram controller baco MB81256-15 microprocessor 80286 internal block diagram MB1431 MB81C1000
Contextual Info: '7 I5 S3E FU J I T S U LTD 37 M T 7 S b 0 0 0 2 1 0 G DMT ì> £ c 3 3 ^ / IFCAJ February 1991 Edition 1.0 FUJITSU DATA SHEET '• MB1430A/1431A DYNAMIC RAM CONTROLLER LSI DYNAMIC RAM CONTROLLER The Fujitsu MB1430A and I431A are high-performance DRAM controtlen.

w89c980p

Abstract: W89C980 RD7M
Contextual Info: W89C980 INTEGRATED MULTIPLE PORT REPEATER G E N E R A L D ESC R IPT IO N The Integrated Multiple Port Repeater IMPR implements the repeater functions specified by section 9 of the IEEE 802.3 standard and twisted pair line transceiver functions conforming to the 10BASE-T

5 input nand gate

Abstract: MC830P MC932 MC832 MC835 mc1813 MC838 MC846 mc963g truth table for 7 inputs OR gate
Contextual Info: mm\L INTEGRATED CIRCUITS FROM MOTOROLA G MC830 Series 0 to +75°C MC930 Series (-55 to +125°) 2 [ M L IS S l E M D T L inte grated c irc u its p ro vid e an e x c e lle n t balance o f sc-eec p o w e r d is s ip a tio n , and noise im m u n ity fo r general purpose a o ta

Contextual Info: CY7C027/028 CY7C037/038 32K/64KX 16/18 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Features • True Dual-Ported memory cells which allow simulta­ neous access of the same memory location • 32K x 16 organization CY7C027 • 64K x 16 organization (CY7C028)

Contextual Info: CY7C027V/028V CY7C037V/038V PRELIMINARY 3.3 V 3 2 K /6 4 K X 16/18 Dual-Port Static RAM • Fully asynchronous operation Features • True Dual-Ported memory cells which allow simulta­ neous access of the same memory location • 32K x 16 organization CY7C027V

Contextual Info: 83C94 10BASE-T TWISTED PAIR TRANSCEIVER PRELIMINARY March 1992 Features • Low Power CMOS Technology - 125 \iA Standby typical ■ High-speed receiver architecture minimizes Jitter m Meets IEEE 802.3 10BASE-T standard for link Integrity, AUI and twisted pair squelch, collision

CI 7805 pin diagram

Abstract: aui rj45 83C94 aui isolation transformer aui db15 to rj45 DTB 020 10MHZ LT6032
Contextual Info: 83C94 83C94 10BASE-T Twisted Pair Transceiver Technology Incorporated Septmeber 5, 1996 PRELIMINARY Features • Low Power CMOS Technology – 125 µA Standby typical Note: Check for latest Data Sheet revision before starting any designs. ■ Meets IEEE 802.3 10BASE-T standard for link

qml-38535

Abstract: 54ABT244 GDFP2-F20 smd "vhz"
Contextual Info: REVISIONS i DATE DESCRIPTION LTR APPROVED YR-MO-DA REV SHEET REV 15 SHEET 16 17 19 20 REV REV STATUS OF SHEETS 1 SHEET 2 Joseph A. Kerby STANDARDIZED MILITARY DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

93C94

Abstract: mau aui DTA 1006 TWISTED PAIR WIRE Valor pt3877 83C94 LT6032 b3c94 LAX-ET304
Contextual Info: G00Q 83C94 10BASE-T TWISTED PAIR TRANSCEIVER PRELIMINARY 1991 Features • L o w P o w e r CMOS T ech n o lo g y - 125 \lA S ta n d b y typ ica l ■ H ig h -spe e d re ce ive r a rc h ite c tu re m in im ize s Jitter ■ R ed u ce d th re s h o ld o p tio n fo r lo n g d ista n ce (20%

AD588AD

Abstract: AD586 XW 3pin AD588SE AD586A AD586J AD586S AD586T AD588BD AD587
Contextual Info: ANALOG DEVICES High Precision 5V Reference AD586 □ FEATURES Laser Trimmed to High Accuracy: 5.000V ±2.0mV M Grade Trimmed Temperature Coefficient: 2ppm/°C max, 0 to +70°C (M Grade) 5ppm/°C max, -40°C to +85°C (B Grade) lOppmfC max, -55°C to + 125°C (T Grade)

tagl2

Abstract: S 0680 LR3000 DK3T TAG23 LR3000AKC33 lr3000gc20 MM7200 TAG24
Contextual Info: Chapter 12: Specifications This chapter presents the following information for the LR3000 and LR3000A processors: • LR3000 Electrical Specifications • LR3000A Electrical Specifications • Timing Diagrams • Mechanical, Pinout, and Mounting Information

yx 805 led driver

Abstract: YX 801 led driver 4 pins yx 801 led driver IC yx 801 led driver yx 805 led "yx 805" led driver yx 801 yx 801 led KSA itt LT6032 pulse TRANSFORMER
Contextual Info: 83C94 10BASE-T TWISTED PAIR TRANSCEIVER PRELIMINARY March 1992 Features • High-speed receiver erchltecture minimizes jitter ■ Low Power CMOS Technology - 125 p.A Standby typical U M n U IEEE 802.3 10BASE-T standard for link Integrity, AUI and twisted pair squelch, collision

Contextual Info: 155 Mbps ATM SAR CONTROLLER FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77201 KEY FEATURES DESCRIPTION • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed). • Performs ATM layer protocol functions.

w89c901

Abstract: W89C905 W89C902 w89c90 W89C925 BUT16
Contextual Info: W89C925 PENTIC IVinbond PCMCIA ETHERNET NETWORK TWISTED-PAIR INTERFACE CONTROLLER GENERAL DESCRIPTION The W89C925 PENTIC is a CMOS device designed for easy implementaion of PCMCIA R2.0/JEIDA 4.1 compatible CSMA/CD local area networks. TheW89C925 combines a W89C902 Serial LAN

MAE 411

Contextual Info: £ ÿ j S G S -T H O M S O N STÌ3220 MOTION ESTIMATION PROCESSOR • PIXELRATE FROM 0 U P TO 20MHz ■ BLOCK SIZE : 8 x 4n, 16 x4n ■ MAXIMUM DISPLACEMENT +7/-8 PIXELS HORIZONTAL AND VERTICAL ■ COMPUTATION OF THE MOTION VECTOR AND MINIMUM DISTORTION ■ RANDOM ACCESS TO THE 256 DISTOR­

W89C906

Abstract: W89C902
Contextual Info: W89C906 TWISTED-PAIR ETHER-LAN CONTROLLER WITH ISA INTERFACE H TELISA H GENERAL DESCRIPTION The TELISA II (Twisted-pair Ether-LAN Controller with ISA Interface II) integrates a W89C902 Serial LAN Coprocessor for Twisted-Pair (SLCT) and PC/AT ISA bus interface logic into a single chip. The

I1774

Contextual Info: HI-774 33 HARRIS 8/vs, Complete 12-Bit A/D Converter With Microprocessor Interface Description Features • C o m p le te 12 B it A /D C o n v e rte r W ith R e fe re n c e and C lo ck • D ig ita l E rro r C o rre c tio n • Full 8 -, 12-, o r 1 6 -B it M ic ro p ro c e s s o r B us In te rfa c e

W89C90

Abstract: CODER MANCHESTER DIFFERENTIAL HAO4 arbiter decoder -1996 w89c901
Contextual Info: Preliminary W89C926 PENTIC+ i.lV in b o n d ^ drHrtP1 E le c tro n ic s C orp . PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER GENERAL DESCRIPTION The W89C926 PENTIC+ is a CMOS device designed for easy implementation ot PCMCIA R2.1 compatible CSMA/CD local area networks. The W89C926 combines a W89C902 Serial LAN