TNRS Search Results

ITB244

Abstract: T520
Contextual Info: CA TA LO G MI CRO S WI T CH a IT B 2 4 4 — 6 SWITCH - BASIC tnrstON cf äwuwus-mwtvhi Kwurot conturr L IS T IN O m tK X T , n iM o tf < F E O . M FR . CODE 91929 1.828 R E F co *- -1.57-1 i — .22 .067 DIA HOLE IN TERMINAL {2 - CVJ cn T .50 H* Jl

Contextual Info: TE X A S IN ST R -CASIC/MEMORY} ^77 i>Ë| 6 ^ 1 7 2 5 D040774 77C 4 0 7 7 4 -§361725 TEXAS 1NSTR ASIC/MEMORY D TM4256EL9, TM4256GU9. TM4257EL9, TM4257GU9 262,144 BY 9-BIT DYNAMIC RAM MODULES SEPTEMBER 1986 - REVISED NOVEMBER 1985 T M 4 2 B .E L9 . . . L SINGLE-IN-UNE PACKAGE

AS6171

Contextual Info: TM4256EL9, TM4256GU9, TM4257EL9, TM4257GU9 262,144 BY 9-BIT DYNAMIC RAM MODULES SEPTEMBER 1 9 8 5 - <* 2 6 2 .1 4 4 X 9 O rganization i* S ingle 5 -V S u p p ly 1 0 % Tolerance i* 3 0 -P in S ingle-in-Ljne Package iSIPJ — Pinned M o dule fo r Throu gh-H o le Inse rtion

A100COLUMN

Contextual Info: 4 ,1 9 4 ,3 0 4 W ORD x 1 BIT D Y N A M IC R A M * This is advanced information and specifica­ tions are subject to change without notice. DESCRIPTION The TC514101AP/AJ/ASJ/AZ is the new generation dynamic RAM organized 4,194,304 words by 1 bit. The TC514101AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as

TH4B

Contextual Info: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis

NZ70

Abstract: TC511001 TC511001AZ adata a55 diagram 4ao5
Contextual Info: TOSHIBA -CLOGIC/MEMORY} 14E D • i-DTVEMß DOlfiTOS S ■ T -46-23-15 TOSHIBA MOS MEMORY PRODUCTS TC511001AP/AJ/AZ-70, TG511001 AP/AJ/flZ-80 TC511001AP/AJ/AZ-10 DESCRIPTION The TC511001AP/AJ/AZ is the new generation dynamic RAM organized 1,048,576 words by

Contextual Info: ADBM-A350 Optical Finger Navigation Data Sheet Description Features The ADBM-A350 sensor is a small form factor SFF optical finger navigation system. • Low power architecture The ADBM-A350 is a low- power optical finger navigation sensor. It has a new, low-power architecture and

microUSB headset

Abstract: MC34825 CEA-936-A CEA 936 MC34673 20-PIN D010 microusb connector 15 pin to usb CEA-936-A UART port speed
Contextual Info: Freescale Semiconductor Advance Information Document Number: MC34825 Rev 2.0, 3/2010 Micro-USB Interface IC Supporting Universal Charging Solution and Wired Accessories 34825 The 34825 is designed to support the Universal Charging Solution INTERFACE IC UCS recommended by the OMTP (Open Mobile Terminal Platform),

Contextual Info: TPS54362-Q1 www.ti.com SLVS845C – MARCH 2009 – REVISED MAY 2010 3A, 60V STEP DOWN DC/DC CONVERTER WITH LOW Iq Check for Samples: TPS54362-Q1 FEATURES • 1 • 2 • • • • • • • • • • • Withstands Transients up to 60V With an Operating Range of 3.6V to 48V

Contextual Info: Am90C255 256K x 1 CMOS Nibble Mode Dynamic RAM PRELIMINARY SSZ006WV DISTINCTIVE CHARACTERISTICS • • • High density 256K x 1 Low-power dissipation — 358 mW active High-speed operation — 80-ns access, 130-ns cycle times • High-speed Nibble Mode - 15-ns access, 35-ns cycle times

microUSB headset

Abstract: CEA-936-A MC34825 CEA-936A CEA-936-A UART port speed TKP 470 M 20-PIN D010 MC34673 pin DIAGRAM OF IC 2407
Contextual Info: Freescale Semiconductor Advance Information Document Number: MC34825 Rev 1.0, 8/2009 Micro-USB Interface IC Supporting Universal Charging Solution and Wired Accessories 34825 The 34825 is designed to support the Universal Charging Solution INTERFACE IC UCS recommended by the OMTP (Open Mobile Terminal Platform),

STM32F429N

Abstract: STM32F429Ni
Contextual Info: STM32F427xx STM32F429xx ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera & LCD-TFT Datasheet - production data Features &"'! • Core: ARM 32-bit Cortex®-M4 CPU with FPU,

Contextual Info: STM32F437xx STM32F439xx ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera&LCD-TFT Datasheet - production data Features &"'! • Core: ARM 32-bit Cortex®-M4 CPU with FPU,

WLCSP49

Contextual Info: STM32F401xB STM32F401xC ARM Cortex-M4 32b MCU+FPU, 105 DMIPS, 256KB Flash/64KB RAM, 10 TIMs, 1 ADC, 11 comm. interfaces Datasheet - production data Features • Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator ART Accelerator™ allowing 0-wait state execution

ASE12

Abstract: b14 smd diode DIODE SMD b14 LP55281RLX smd transistor 2f en francais LP55281 LP55281RL LP55281TL LP55281TLX D56B
Contextual Info: LP55281 Quad RGB Driver General Description Features LP55281 is a quad RGB LED driver for handheld devices. It can drive 4 RGB LED sets and a single fun light LED. The boost DC-DC converter drives high current loads with high efficiency. The RGB driver can drive individual color LEDs or

LP3933

Abstract: LP3936 LP3950 LP3950SL LP3950SLX
Contextual Info: LP3950 Color LED Driver with Audio Synchronizer General Description Features The LP3950 is a color LED driver with a built-in audio synchronization feature for any analog audio input such as polyphonic ring tones and MP3 music. LEDs can be synchronized to an audio signal with two methods - amplitude

CMP12

Abstract: SM5904CF CXD2517
Contextual Info: SM5904CF compression and non compression type shock-proof memory controller NIPPON PRECISION CIRCUITS INC. Overview The SM5904CF is a compression and non compression type shock-proof memory controller LSI for compact disc players. The compression level can

CMP12

Abstract: SM5904BF CAS-000
Contextual Info: SM5904BF compression and non compression type shock-proof memory controller NIPPON PRECISION CIRCUITS INC. Overview The SM5904BF is a compression and non compression type shock-proof memory controller LSI for compact disc players. The compression level can

CMP12

Abstract: SM5905AF
Contextual Info: SM5905AF compression and non compression type shock-proof memory controller NIPPON PRECISION CIRCUITS INC. Overview The SM5905AF is a compression and non compression type shock-proof memory controller LSI for compact disc players. The compression level can

Contextual Info: TOSHIBA _ MEMORY _ E lectronic C omponents B usiness S ector _ 4,194,304 W O R D X 1 B IT D Y N A M IC RAM T C 5 1 4 1 0 1 J/ Z -8 0 T C 5 1 4 1 0 1 J / Z -1 0 DESCRIPTION The TC514101J/Z is the new generation dynamic RAM organized 4,194,304 words by 1

az60

Contextual Info: 4,194,304 W O R D x 1 BIT D Y N A M IC R A M * This is advanced inform ation and specifica­ tions are subject to change w ithout notice. D ESC R IPT IO N The TC514101AP/AJ/ASJ/AZ is the new generation dynam ic RAM organized 4,194,304 words by 1 bit. The TC514101AP/AJ/ASJ/AZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as

Contextual Info: FEDL22420-06 Issue Date: Oct.10, 2013 ML22420MB/ML22460MB Speech Synthesis LSI with Serial ROM Interface Including 4-Channel Mixing Function GENERAL DESCRIPTION ML22420 and ML22460 are voice synthesis LSIs with serial interface to the external ROM that stores voice

STM32F21xxx reference manual

Abstract: STM32 F4 touch frame STM32F20xxx reference manual Connecting the FSMC to the LCD Intel STM32F20x Connecting the FSMC to the LCD DCMI timing specification STM32F10xx diode S6 78A stm32f217xx
Contextual Info: STM32F215xx STM32F217xx ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera Datasheet − production data Features • ■ FBGA Core: ARM 32-bit Cortex -M3 CPU 120 MHz

xf 017

Abstract: zx 15 itt SFT243 4096U D85H 6.3 UTE cxd2517 m6 90 v-0 CMP12 SM5902
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