TLC27M2MJGB Search Results
TLC27M2MJGB Datasheets (4)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| TLC27M2MJGB | Texas Instruments | Dual Precision Single Supply Low-Power Operational Amplifier | Original | 542.68KB | 36 | ||
| TLC27M2MJGB | Texas Instruments | Dual Precision Single Supply Low-Power Operational Amplifier 8-CDIP -55 to 125 | Original | 945.38KB | 45 | ||
| TLC27M2MJGB | Texas Instruments | TLC27M2 - Dual Precision Single Supply Low-Power Operational Amplifier 8-CDIP -55 to 125 | Original | 1.57MB | 50 | ||
| TLC27M2MJGB | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 39.45KB | 1 |
TLC27M2MJGB Price and Stock
Texas Instruments TLC27M2MJGB |
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TLC27M2MJGB Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
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Contextual Info: TLC27M2MJGB Linear ICs Dual General Purpose Op Amp status Military/High-RelY Input Bias Current Max. A 35n Unity Gain BW (Hz)330k V(io) Max. (V)12m I(io) Max. (A)15n Com Mode Inp Range (VICR)3.5 Input Resistance Typ. (Ohms) Temp Coef. of VIO1.7u P(D) Max. (W)1.05 |
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tlc27m2mjgbcode8-582numberln00800582description15v/mv | |
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Contextual Info: TLC27M2MJGB SMD Linear ICs Dual General Purpose Op Amp statusû Military/High-RelY Input Bias Current Max. (A)35n Unity Gain BW (Hz) V(io) Max. (V)12m I(io) Max. (A)15n Com Mode Inp Range (VICR)3.5 Input Resistance Typ. (Ohms) Temp Coef. of VIO1.7u P(D) Max. (W)1.05 |
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tlc27m2mjgbdescription15v/mv | |
TLC27M2MFKContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+3 | |
TLC27M2MFK
Abstract: TLC27M2MFKB
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+3 | |
TLC27M2MFKContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+6 | |
TLC27M2
Abstract: TLC27M2A TLC27M2ACD TLC27M2B TLC27M2BCD TLC27M2BID TLC27M2CD TLC27M7 TLC27M7CD TLC27M7ID
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+7 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
TLC27M
Abstract: TLC27M2 TLC27M2A TLC27M2ACD TLC27M2B TLC27M2BCD TLC27M2BID TLC27M2CD TLC27M7 TLC27M7CD
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+7 | |
27M2CContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+2 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
|
Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
TLC27M2MFKBContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+2 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
TLC27M2MFK
Abstract: TLC27M2MFKB
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+3 | |
negative temperature coefficient devices 1n4148
Abstract: TLC27M2 TLC27M2A TLC27M2ACD TLC27M2B TLC27M2BCD TLC27M2BID TLC27M2CD TLC27M7 TLC27M7CD
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+7 | |
tlc27m7
Abstract: TLC27M2MFK TLC27M2MFKB
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+3 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051C – OCTOBER 1987 – REVISED MAY 1999 D D D D D Trimmed Offset Voltage: TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V Input Offset Voltage Drift . . . Typically |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
TLC27M2MFKBContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+2 | |
TLC27M2A
Abstract: TLC27M2 TLC27M2ACD TLC27M2B TLC27M2BCD TLC27M2BID TLC27M2CD TLC27M7 TLC27M7CD TLC27M7ID
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Original |
tlc27m2tlc27m2atlc27m2btlc27m7+7 | |
27M2CContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+2 | |
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Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |
|
Contextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008 D Trimmed Offset Voltage: D D D D, JG, P OR PW PACKAGE TOP VIEW 8 2 7 3 6 4 5 D D D D DISTRIBUTION OF TLC27M7 INPUT OFFSET VOLTAGE |
Original |
tlc27m2tlc27m2atlc27m2btlc27m7+1 | |