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    TIME DELAY CHIP Search Results

    TIME DELAY CHIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    AM27S25DM
    Rochester Electronics LLC AM27S25 - OTP ROM PDF Buy
    27S185ADM/B
    Rochester Electronics LLC 27S185A - OTP ROM, 2KX4 PDF Buy
    27S185ALM/B
    Rochester Electronics LLC 27S185A - OTP ROM, 2KX4 PDF Buy
    9513ADC
    Rochester Electronics LLC 9513A - Rochester Manufactured 9513, System Timing Controller PDF Buy
    9513ADC-SPECIAL
    Rochester Electronics LLC 9513A - Rochester Manufactured 9513, System Timing Controller PDF Buy

    TIME DELAY CHIP Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    3216TD

    Abstract: IEC-286-3 3216TD10 3216TD10-R
    Contextual Info: HALOGEN Time-Delay Chip Fuses HF FREE 3216TD Series Pb Dimensions - mm in Drawing Not to Scale Description • Time-delay, surface mount fuse • RoHS compliant, lead-free and halogen-free • High inrush withstand capability • Wire-in-Air performance


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    3216TD E19180 MIL-STD-202, ANSI/J-STD-002C, TR/3216TD1-R) BU-SB10214 IEC-286-3 3216TD10 3216TD10-R PDF

    41256 dram

    Abstract: 4164 dram 41256 AUDIO DELAY CIRCUIT DIAGRAM PCB digital echo sound dram 4164 HT8955 HT8955A Echo Processor IC delay PCB echo sound
    Contextual Info: HT8955A Voice Echo Features • • • • Operating voltage: 5.0V Long delay time – 0.8 seconds SEL=VSS, 256K DRAM – 0.2 seconds (SEL=VDD/open, 64K DRAM) 25kHz sampling rate Continuous variable delay time • • • • • • Built-in pre-amplifier


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    HT8955A 10-bit 24-pin 25kHz HT8955A 256Kb 50kHz) 41256 dram 4164 dram 41256 AUDIO DELAY CIRCUIT DIAGRAM PCB digital echo sound dram 4164 HT8955 Echo Processor IC delay PCB echo sound PDF

    ed27 diode

    Contextual Info: Time-Delay and Integration TDI Image Sensor (128 x 1024 element) with Small, High Performance Pixels R.H. Dyck, Y.S. Abedini, J.s. Kim, K.K. Shah Fairchild Weston Systems Incorporated, CCD Imaging Division TIME-DELAY AND INTEGRATION (TDI) This high value is attributed to the good charge transfer efficiency


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    34-pin ed27 diode PDF

    PI250

    Contextual Info: Photo IC for laser beam synchronous detection S10456 Stable timing output with small variations in propagation delay time The S10456 photo IC uses a dual-element Si PIN photodiode and compares the two signals to obtain a highly stable output. The S10456 shows small variations in the propagation delay time even when laser power fluctuates, so that stable


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    S10456 KPIC1070E03 PI250 PDF

    Bt605

    Abstract: SY605 SY605JC
    Contextual Info: 125MHz WRITE PROGRAMMABLE TIMING EDGE VERNIER DESCRIPTION FEATURES • True 125MHz retrigger rate Micrel-Synergy's SY605 is an ECL-compatible timing vernier delay generator whose time delay is programmed via an 8bit code which is loaded via an independent "WRITE" input.


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    125MHz SY605 125MHz, 4ns/255 SY605JC J28-1 SY605JCTR Bt605 SY605JC PDF

    ESD Pushbutton data sheet

    Abstract: Portable tv Circuit Diagram schematics SMR100 SMR100S JEDEC20
    Contextual Info: SMR100 THIS PRODUCT HAS REACHED END OF LIFE Programmable Long-Delay Push-Button Reset Controller for Consumer Equipment FEATURES & APPLICATIONS INTRODUCTION • De-Bounced Reset Input with up to 40 Second Programmable Delay Time • External Push-Button Control Provides a


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    SMR100 SMR100 ESD Pushbutton data sheet Portable tv Circuit Diagram schematics SMR100S JEDEC20 PDF

    Tacens

    Contextual Info: S O N C X L 5 0 0 2 P/M Y CMOS-CCD 1 / 2 H Delay Line for NTSC Description Package Outline C XL5002P//CXL5002M are general purpose CCD delay line ICs which provide 1 /2 H delay time of CXL5002P 8 pin DIP NTSC. Unit : mm 9.4 Features • Lo w power dissipation 70mW Typ.


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    XL5002P// CXL5002M CXL5002P 180IRE 28Vp-p, 150mVp-p DSP-8P-01 Tacens PDF

    Contextual Info: * SYNERGY SEMICONDUCTOR 125 MHz WRITE PROGRAMMABLE TIMING EDGE VERNIER FEATURES SY605 DESCRIPTION True 125MHz retrigger rate Synergy's SY605 is an ECL-compatible tinning vernier delay generator whose time delay is programmed via an 8bit code which is loaded via an independent "WRITE" input.


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    SY605 125MHz SY605 125MHz, 4ns/255 PDF

    Contextual Info: * SYNERGY SEMICONDUCTOR 125 MHz WRITE PROGRAMMABLE TIMING EDGE VERNIER FEATURES SY605 DESCRIPTION True 125MHz retrigger rate Synergy's SY605 is an ECL-compatible tinning vernier delay generator whose time delay is programmed via an 8bit code which is loaded via an independent "WRITE" input.


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    SY605 125MHz SY605 125MHz, 4ns/255 PDF

    Contextual Info: 19-0094; Rev. 3; 5/93 M icroprocessor Supervisory C ircuits + 2 %. _ F e a tu re s ♦ 200ms Power OK/Reset Time Delay ♦ 1|iA Standby Current, 35 iA Operating Current ♦ On-Board Gating of Chip-Enabie Signals, 10ns Max Delay ♦ MaxCap or SuperCap® Compatible


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    200ms MAX800L/M) 16-Pin MAX691ACPE MAX691ACSE MAX691ACWE MAX800LESE MAX800MCPE MAX800MCSE MAX800MEPE PDF

    Signetics NE555 Application note

    Abstract: NE555 NE555 astable NE555 timer NE555 signetics NE555M replacement to ne555 of monostable timer NE555 ne555 example circuits pin configuration of ne555
    Contextual Info: NE555 DESCRIPTION These devices are monolithic timing circuits capable of producing accurate time delays or oscillation. In the time delay mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of


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    NE555) NE555 NE555M) NE555 NE555M Signetics NE555 Application note NE555 astable NE555 timer NE555 signetics NE555M replacement to ne555 of monostable timer NE555 ne555 example circuits pin configuration of ne555 PDF

    MAX9693

    Abstract: MAX9691 MAX9691EPA MAX9691ESA MAX9691EUA MAX9692 ECL-logic
    Contextual Info: 19-1789; Rev 1; 10/02 Single/Dual, Ultra-Fast, ECL-Output Comparators with Latch Enable Features ♦ 1.2ns Propagation Delay ♦ 100ps Propagation Delay Skew ♦ 150ps Dispersion ♦ 0.5ns Latch Setup Time ♦ 0.5ns Latch-Enable Pulse Width ♦ Available in µMAX and QSOP Packages


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    100ps 150ps MAX9691EUA MAX9691ESA MAX9691EPA MAX9691 MAX9692 MAX9693 MAX9691/MAX9692/MAX9693 MAX9693 MAX9691 MAX9691EPA MAX9691ESA MAX9691EUA MAX9692 ECL-logic PDF

    7555

    Abstract: 7555 monostable mode ASTABLE TIMER 7555 LA 7555 H 7555 HI-7555 7555 timer astable multivibrator 7555c 7555 cmos timer CMOS 7555
    Contextual Info: HI-7555/HI-C555 CMOS GENERAL PURPOSE TIMERS General Description The HI-7555 and HI-C555 are highly stable CMOS devices capable of producing accurate time delays or frequencies. Ter­ minals are provided for triggering or resetting the device as required. In the time delay mode of operation, the time is precisely


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    HI-7555/HI-C555 HI-7555 HI-C555 SE555/NE555 HI-7555 /HI-C555 HI-7555/HI-C555 222-HOLT 7555 7555 monostable mode ASTABLE TIMER 7555 LA 7555 H 7555 7555 timer astable multivibrator 7555c 7555 cmos timer CMOS 7555 PDF

    NIS5102

    Abstract: NIS5102QP1HT1 NIS5102QP1HT1G NIS5102QP2HT1 NIS5102QP2HT1G
    Contextual Info: NIS5102 High Side SMART HotPlugE IC/Inrush Limiter/Circuit Breaker The NIS5102 is a controller/FET IC that saves design time and reduces the number of components required for a complete hot swap application. It is designed for +12 V applications. This chip includes a time delay for sequencing applications. It has a


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    NIS5102 NIS5102 NIS5102/D NIS5102QP1HT1 NIS5102QP1HT1G NIS5102QP2HT1 NIS5102QP2HT1G PDF

    Signetics NE555 Application note

    Abstract: NE555 420 NE555 signetics NE555 timer NE555 astable NE555M replacement to ne555 NE555 applications and pins configurations ne555 example circuits Ne555 8 pin
    Contextual Info: Precision Timing Circuit NE555 DESCRIPTION These devices are monolithic timing circuits capable of producing accurate time delays or oscillation. In the time delay mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of


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    NE555) NE555 NE555 NE555M Signetics NE555 Application note NE555 420 NE555 signetics NE555 timer NE555 astable NE555M replacement to ne555 NE555 applications and pins configurations ne555 example circuits Ne555 8 pin PDF

    HYB39S128800CT-7

    Abstract: S-320-24
    Contextual Info: Preliminary Data Sheet Features • • • • • • • • • JEDEC Standard 168-pin SDRAM DIMM Low Latency CAS2 PC133 MHz Modules 2:2:2 • CAS Latency = 2 • RAS to CAS Delay = 2 • Precharge Delay = 2 Low Profile for 1U Rack Mount Systems Fast 5.4 ns Clock Access Time


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    168-pin 128MB, 256MB PC133 SM12808ALDT-7 SM12809ALDT-7 HYB39S128800CT-7 S-320-24 PDF

    xnor cmos

    Abstract: DS1012Z DS1012 DS1012M 1040d1
    Contextual Info: DS1012 DS1012 2-in-1 Sub-Miniature Silicon Delay Line with Logic FEATURES PIN ASSIGNMENT • All-silicon time delay • 53 µW max. CMOS quiescent mode • Surface mount 8-pin mini-SOIC and standard 8-pin DIP 1 8 VCC 2 7 IN2 OUT1 3 6 OUT2 GND 4 5 OUT4 DS1012M 8-PIN DIP 300 MIL


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    DS1012 DS1012M DS1012Z DS1012 xnor cmos 1040d1 PDF

    Contextual Info: 19-2790; Rev 3; 7/10 155Mbps to 2.5Gbps Burst-Mode Laser Driver ♦ ♦ ♦ ♦ ♦ Multirate Operation from 155Mbps to 2.5Gbps Burst Enable/Disable Delay <2ns Burst On-Time of 576ns to Infinity Infinite Bias-Current Hold Time Between Bursts DC-Coupled Operation with Single +3.3V Power


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    155Mbps MAX3656 MAX3656 PDF

    smd fuse p

    Abstract: smd fuse m smd fuses fuse 12a smd 3216TD 3216FF backlight fuse
    Contextual Info: 3216TD Series Time Delay Chip Fuse Provides Superior Protection Against Inrush Currents TM Offering the Highest I2T Rating in its Class, the 3216TD Series is Available up to 12 Amps 1. Superior Inrush Withstand Performance The 3216TD provides top notch protection against nuisance


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    3216TD 3216FF smd fuse p smd fuse m smd fuses fuse 12a smd backlight fuse PDF

    Contextual Info: TIMING DIAGRAMS r Parameter <1 min ao .c s .d a c k .ld c r typ max units ns 90 ns ns Set Up to RD Low x2 RD Width *3 AO.CS.DACK.LDCR Hold from RD High u Data Access Time from RD Low 90 ns «5 Data to Float Delay from RD High .65 ns *6 IRQ Reset Delay from RD High


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    150ns) PDF

    SDAS022C

    Contextual Info: SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B HEX 2-INPUT NAND DRIVERS SDAS022C - DECEMBER 1982 - REVISED JANUARY 1995 High Capacitive-Drive Capability ALS804A Has Typical Delay Time of 4 ns SN54ALS804A, SN54AS804B . . . J PACKAGE SN74ALS804A, SN74AS804B . . . DW OR N PACKAGE


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    SN54ALS804A, SN54AS804B, SN74ALS804A, SN74AS804B SDAS022C ALS804A AS804B 300-mil SN54ALS804A SN54AS804B PDF

    D3323

    Abstract: 22v10z 30INT transistor k 525
    Contextual Info: TICPAL22V10Z-25C, TICPAL22V10Z-30I EPIC CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS _SRPS007C - D3323. SEPTEMBER 1989 - REVISED FEBRUARY 1992 JTL AND NT PACKAGE TOP VIEW 24-Pin Advanced CMOS PLD Virtually Zero Standby Power CLK/ Propagation Delay Time:


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    TICPAL22V10Z-25C, TICPAL22V10Z-30I SRPS007C D3323. 24-Pin 752S6 D3323 22v10z 30INT transistor k 525 PDF

    Contextual Info: SN54ALS832A, SN54AS832B, SN74ALS832A, SN74AS832B HEX 2-INPUT OR DRIVERS SDAS017C - DECEMBER 1982 - REVISED JANUARY 1995 High Capacltlve-Drlve Capability 'ALS832A Has Typical Delay Time of 4.8 ns SN54ALS832A, SN54AS832B. . . J PACKAGE SN74ALS832A, SN74AS832B . . . DW OR N PACKAGE


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    SN54ALS832A, SN54AS832B, SN74ALS832A, SN74AS832B SDAS017C ALS832A AS832B 300-mll SN54ALS832A SN54AS832B PDF

    MO-220

    Abstract: X24C16 X80120Q20I X80121Q20I
    Contextual Info: X80120/X80121 New Industry Features – – – – – – – Programmable time sequencing Integrated oscillator and dividers No crystal required Dual voltage monitors Remote delay selection Remote monitor/switch diagnostics Cascade delays of multiple devices


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    X80120/X80121 MO-220 X24C16 X80120Q20I X80121Q20I PDF