ZL50011QCG1
Abstract: GR-1244-CORE MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • March 2006 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information 160 Pin LQFP Trays 144 Ball LBGA Trays 160 Pin LQFP* Trays, Bake & Drypack
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ZL50010
Abstract: TFR1M GR-1244-CORE MS-026
Contextual Info: ZL50010 Flexible 512-ch DX with Enhanced DPLL Data Sheet Features VDD ZL50010/QCC ZL50010/GDC • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15
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GR-1244-CORE
Abstract: MS-026 ZL50011 11CH marking
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL
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GR-1244-CORE
Abstract: MS-026 ZL50010
Contextual Info: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay
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ZL50010QCG1
Abstract: GR-1244-CORE MS-026 ZL50010 32CH1
Contextual Info: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0
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GR-1244-CORE
Abstract: MS-026 ZL50010 TFPW0
Contextual Info: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay
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MO-151
Abstract: MT90866 MT90866AG ST012 lidr-9
Contextual Info: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features October 2003 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching among
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Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL
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002E
Contextual Info: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between
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FOX 20.000 MHZ
Abstract: LMT 324 slv ca2 GR-1244-CORE MS-026 ZL50010 STO14 tfk8k
Contextual Info: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay
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lidr-9
Abstract: MO-151 MT90866 MT90866AG MT90866AG2 ST012 G7-G14
Contextual Info: MT90866 Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch Data Sheet Features September 2005 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams
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LG01
Abstract: ZL50030 ZL50030GAC
Contextual Info: ZL50030 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 1,024 x 1,024 non-blocking switching between local streams
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GR-1244-CORE
Abstract: MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512-ch DX with on-chip DPLL Data Sheet Features VDD • • • Applications • • • • • Small and medium digital switching platforms Access Servers Time Division Multiplexers Computer Telephony Integration Digital Loop Carriers VSS
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LG01
Abstract: ZL50031 ZL50031QEG1
Contextual Info: ZL50031 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching between local streams
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tfk8k
Abstract: lg1001 LID17
Contextual Info: MT90866 WAN Access Switch Preliminary Information Features • • • • • • • • • • • • • • • • • • • • • • • • 3.3V operation with 5V tolerant inputs and I/O’s 5V tolerant PCI driver on CT-Bus I/O’s 2,432 x 2,432 non-blocking switching among local
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32.768Mhz oscillator
Abstract: FOX 20.000 MHZ GR-1244-CORE MS-026 ZL50011 tfk8
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL
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lidr-9
Abstract: CH254 MO-151 MT90866 MT90866AG MT90866AG2 ST012 dom2 ZL50031
Contextual Info: MT90866 Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch Data Sheet Features January 2006 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams
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Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • September 2011 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information ZL50011/GDC 144 Ball LBGA Trays ZL50011QCG1 160 Pin LQFP* Trays, Bake & Drypack
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Contextual Info: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0
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LG01
Abstract: ZL50031 ZL50031QEG1 lg1001
Contextual Info: ZL50031 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching between local streams
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GR-1244-CORE
Abstract: MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL
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VME backplane pinout
Contextual Info: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between
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lg124
Contextual Info: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between
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Contextual Info: MT90866 Flexible Digital Switch with H.110 Interface Data sheet Features • • • • • • • • • • • • • • • • • • • • • • • • 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between
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