TEST10 Search Results

cisco 2911

Abstract: MR4A MR7N "LINK STATE"
Contextual Info: Advance Data Sheet May 1999 LU3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 256-Pin PBGA is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and

T60407

Abstract: Pulse Transformer T60407 ST5481 TQFP48 LINE FEED ISDN RJ45 plug dimension spec "Hot Plug and Play"
Contextual Info: ST5481 L.O.U.I.S - LOW COST USB ISDN SOLUTION PRODUCT PREVIEW • COMMUNICATION DEVICE CLASS AND HARDWARE FEATURES VENDOR REQUESTS S/T ISDN Interface ■ SUPPORTS OSI LEVEL 1 IN CONFOR- ■ BUS OR SELF POWERED APPLICATION PIN PROGRAMMABLE MANCE WITH UIT-T I.430 FOR BASIC

Myson MTD972

Abstract: 10BASET 20MHZ MTD972 1b.9 MYSON TECHNOLOGY
Contextual Info: MTD972 Preliminary MYSON TECHNOLOGY 100BaseTX PCS/PMA FEATURES • · · · · · · · · · · IEEE 802.3 10BaseT and 802.3u 100BaseTx compliant. MII interface with serial management. Auto negotiation compatible with next page capability. 100BaseTx PCS/PMA function with on-chip clock generation and recovery.

3014 LED

Abstract: "LINK STATE"
Contextual Info: Advance Data Sheet July 1999 LU3X38FTR 208-Pin SQFP OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 208-Pin SQFP is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and

TPIN10

Abstract: lucent m12 timing receiver the RMII Consortium Specification LU3X312FTR
Contextual Info: Preliminary Data Sheet April 2000 LU3X312FTR 12-Port FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview Features Devices designated M-LU3X312TR-BA352 are classified as models. Devices are not guaranteed compliant to all data sheet specifications. Devices labeled

SMII specification

Contextual Info: Advance Data Sheet October 1999 LU3X38FTR 256-Pin PBGA OCTAL-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X38FTR 256-Pin PBGA is an eight-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and

Contextual Info: Advance Data Sheet June 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches

tda 3310

Abstract: SAA2003 SAA2013 SAA2013H
Contextual Info: P r e lim in a r y s p e c if ic a tio n P h ilip s S e m ic o n d u c to r s Adaptive allocation and scaling for PASC coding in DCC systems_ SAA2013 FEATURES • Wide operating voltage range: 2.7 to 5.5 V • Low power consumption: 13 mW; 3.0 V

schematic diagram avr t10

Abstract: CR16 CR18 ML7033 OD9652N QFP64-P-1414-0 AG1039 A4T10
Contextual Info: DATA SHEET O K I O P T Preliminary I C A L C O M P O N E N T S OD9652N 10-Gbps Optical Receiver Module October 2001 Document Reference: JOG-00885, Rev. 1 Oki Semiconductor FEDL7033-01 1Semiconductor ML7033 This version: Jun. 2001 Previous version: Apr. 2001

NCO10

Abstract: CXD1961AQ TUD32 TUD14 TUD22 AT/TDB1-0524SU
Contextual Info: CXD1961AQ DVB-S Frontend IC QPSK demodulation + FEC Preliminary Description The CXD1961AQ is a single chip DVB compliant Satellite Broadcasting Frontend IC, including dual A/D converter for analog baseband I/Q input, QPSK demodulator, Viterbi decoder Reed-Solomon decoder

yamaha equalizer diagram

Abstract: LT 5208 YTD410 YM7405 YTD418 YTD423 YTD428
Contextual Info: YTD428 IDSU DSU LSI for the ISDN Terminal Equipment INTRODUCTION YTD428 is a LSI which provides the ISDN subscriber interface two-wire time compression multiplexing operation and the NT side of the ISDN Basic Rate user-network interface function (digital four-wire time-division full-duplex operation). It is capable of providing the electric

MR29

Abstract: DNC3X3625 MR20 MR21 MR30 MR31 "network interface cards"
Contextual Info: Advance Data Sheet March 2000 DNC3X3625 Hex 10/100 Mbits/s Ethernet Transceiver Macrocell Features Hex 100 Mbits/s FX Transceiver Hex 10 Mbits/s Transceiver • Compatible with IEEE 802.3u 100Base-FX standard. ■ DSP based. ■ ■ Compatible with IEEE * 802.3 10Base-T standard

1F7 1f8 1f9

Abstract: S068 TRANSISTOR 2A1 DA16 M35062 M35062-001SP M35062-XXXSP HSZ5 1a3 capacitor
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

PTC SCK 055

Abstract: PTC SCK 052 30116 4116 2N M35061-002SP PAL 007 PAL 007 B PAL 007 c PAL 007 E M35061-XXXFP
Contextual Info: MITSUBISHI MICROCOMPUTERS M35061-XXXSP/FP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION M35061-XXXSP/FP is CATV screen display control IC which can display 40 horizontal ✕ 17 (vertical). It has built-in SYRAM which can be used with character ROM.

01E16

Abstract: 02A16 08D16 08C16 09A16 02a16 021 03A16 04B16 V18Z1 DA16
Contextual Info: MITSUBISHI MICROCOMPUTERS M35074-XXXSP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION The M35074-XXXSP is a character pattern display control IC can PIN CONFIGURATION TOP VIEW display on the digital camera, the digital video, the digital television, the CRT display, the liquid crystal display and the plasma

PTC SCK 055

Abstract: scrolling led display circuit cr 29c PAL 007 PAL 007 B PTC SCK 052 S057 TH sck 083 M35062 M35062-001SP
Contextual Info: MITSUBISHI MICROCOMPUTERS M35062-XXXSP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION M35062-XXXSP is CATV screen display control IC which can display 40 horizontal x 17 (vertical). It has built-in SYRAM which can be used with character ROM.

datasheet b616

Abstract: A016 led display circuit diagram transistor d716 5b16 a016 transistor C516 E716 ic ram 2816 transistor b616
Contextual Info: MITSUBISHI MICROCOMPUTERS M35072-XXXFP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION FEATURES • Screen composition . 24 characters x 12 lines × 2 pages • Number of characters displayed . 288 Max. × 2 pages

tr c216

Abstract: transistor A916 HP10 M35076-001SP M35076-XXXSP
Contextual Info: MITSUBISHI MICROCOMPUTERS M35076-XXXSP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION FEATURES Screen composition . 24 characters x 12 lines × 2 pages Number of characters displayed . 288 Max. × 2 pages Character composition . 12 ✕ 18 dot matrix

interface of T9 with microcontroller

Abstract: SAA2520 SAA2521 SAA2521GP compression mpeg 1 layer 2 audio compression layer 2 MBC140 audio compression
Contextual Info: INTEGRATED CIRCUITS DATA SHEET SAA2521 Masking threshold processor for MPEG layer 1 audio compression applications Preliminary specification File under Integrated Circuits, IC01 August 1993 Philips Semiconductors Preliminary specification Masking threshold processor for MPEG

4374

Abstract: s1d1 S1D15E06 S1D15E06D01B000 S1D15E06D01E000 S1D15E06D03B000 S1D15E06D03E000 S1D15E06T00A00A SED1575
Contextual Info: MF1393-05 S1D15E06 Series Rev. 2.1 NOTICE No part of this material may be reproduced or duplicated in any from or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notics. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material

P54DR

Abstract: ir receiver module sj 1838 mmc 304 SANDISK 16bit RFT Semiconductors gsm model DBAS 74 61 SERVICE MANUAL SANYO sram book free transistor equivalent book Sanyo
Contextual Info: REJ09B0286-0300 The revision list can be viewed directly by clicking the title page. The revision list summarizes the locations of revisions and additions. Details should always be checked by referring to the relevant text. 16 H8S/2158 Group, H8S/2158 F-ZTAT

DS26504

Contextual Info: DESIGN KIT AVAILABLE DS26504 T1/E1/J1/64KCC BITS Element www.maxim-ic.com GENERAL DESCRIPTION The DS26504 is a building-integrated timing-supply BITS clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, 64kHz composite clock

hart modem

Abstract: 20c15 lsi 20c15 HCF_Test HART BELL 202 hart modem application note 20c15 Hart Modem A5191HRT isolated 4 to 20ma analog transmitter circuit
Contextual Info: A5191HRT HART Modem Application Note 1.0 Introduction HART is a registered trademark of the HART Communication Foundation of Austin, Texas, USA. Any time that the term 'HART' is used hereafter in this document or in any document referenced by this document, that term implies the registered trademark.

ARM992T

Abstract: KS8695X 0x80D0 KSZ8695X KS8695 ARM922T 100BASE-FX 16Kx32 0x80A0
Contextual Info: KS8695X Integrated Multi-Port High-Performance Gateway Solution Rev. 1.03 General Description The CENTAUR KS8695X, Multi-Port Gateway-on-a-Chip, delivers a new level of networking integration and performance for accelerating broadband gateway development. Key components integrated in the KS8695X