TDD4404 Search Results

Contextual Info: ISSP IS28F002BV/BLV 262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation A u to m a te d B y te W rite an d B lo c k E rase — In d u s try -S ta n d a rd C o m m a n d U ser

Contextual Info: 64K x 32 LOW VOLTAGE SYNCHRONOUS PIPELINE STATIC RAM ADVANCE INFORMATION MARCH 1997 FEATURES DESCRIPTION • Fast access time: The IS S I IS61LV6432 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the Pentium , 680X0™,

tdq4-M

Abstract: HP 2231 IS42S16128
Contextual Info: 28 i 256K x 16 4-MBIT SYNCHRONOUS DYNAMIC RAM ADVANCE INFORMATION JUNE 1997 FEATURES DESCRIPTION • Clock frequency: 100 MHz • Two Bank internal structure: ISSI's 4Mb Synchronous DRAM IS42S16128 is organized as a 131072-word x 16-bit x 2-bank for improved performance.

D2259

Contextual Info: ISSI 128K x 36 SYNCHRONOUS PIPELINED STATIC RAM ADVANCE INFORMATION JUNE1997 FEATURES DESCRIPTION • Fast access time: The IS S IIS61SP12836 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

DDD0444

Contextual Info: issr IS28F200BV/BLV 131,072 x 16/262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation ADVANCE INFORMATION NOVEMBER 1996 • Industrial Temperature Operation 40°C to +85°C

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Abstract: HOA9 IS28F020 TGD4404
Contextual Info: ISSI IS28F020 262,144 x 8 CMOS FLASH MEMORY p r e l im in a r y SEPTEMBER 1995 FEATURES • High performance - 70 ns maximum access time • CMOS low power consumption - 30 mA maximum active current -100 maximum standby current • Compatible with JEDEC-standard byte-wide

Contextual Info: ISSI -r iiS IS62C64 •M t» 8K x 8 LOW POWER CMOS STATIC RAM FEATURES DESCRIPTION • CMOS low power operation The IS S IIS62C64 is a low power, 8,192-word by 8-bit static RAM. It is fabricated using ISSPs high-performance CMOS technology. — 400 mW max. operating

IS93C46-3

Abstract: sk 451 d15d01
Contextual Info: ISSI 1,024-BIT SERIAL ELECTRICALLY ERASABLE PROM A U G U S T 1995 FEATURES OVERVIEW • State-of-the-art architecture — Non-volatile data storage — Low voltage operation: 3.0V Vcc = 2.7V to 6.0V — Full T TL compatible inputs and outputs — Auto increment for efficient data dump

Contextual Info: ISSI 262,144 x 8 CMOS FLASH MEMORY p r e l im in a r y SEPTEMBER 1995 FEATURES • High pe rfo rm an ce - 70 ns m axim um acce ss tim e • Flash electrical bulk chip-e ra se - O ne second typica l chip-e ra se • C M O S low p o w e r con sum p tion - 30 m A m axim um active curre nt

Contextual Info: ISSI I S 2 7 L V 5 1 2 65,536 X 8 LOW VOLTAGE CMOS EPROM FEATURES DESCRIPTION • Single 3.3V power supply The IS S IIS27LV512 is a low voltage, low power, high-speed 512K-bit CMOS 64K-word by 8-bit Ultraviolet Erasable CMOS Programmable Read-Only Memory. It utilizes the standard

Contextual Info: ISSI IS89C52 CMOS SINGLE CHIP 8-BIT MICROCONTROLLER with 8-Kbytes of FLASH PRELIMINARY APRIL 1998 FEATURES GENERAL DESCRIPTION • 80C51 based architecture The ISSIIS89C52 is a high-performance microcontroller fabricated using high-density CMOS technology. The

Contextual Info: 256K x 16 4-MBIT SYNCHRONOUS DYNAMIC RAM ADVANCE INFORMATION JUNE 1997 FEATURES DESCRIPTION • Clock frequency: 100 MHz ISSI's 4Mb Synchronous DRAM IS42S16128 is organized as a 131072-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer