TD B6 HK 95 N Search Results

155.520000

Abstract: FX-427 BK 1085
Contextual Info: FX-402 Low Jitter Frequency Translator Previous Part Number FX-427 FX-402 Description The FX-402 is a precision quartz-based frequency translator used to translate 1 to 4 selected input clocks as low as 8 kHz to an integer multiple as high as 850 MHz. The FX-402’s superior jitter performance is achieved through the filtering action of the onboard voltage-controlled SAW oscillator VCSO and integrated loop filter. Two low-jitter outputs are provided. Monitoring and

5575

Abstract: 155.520000 FX-424 JSTD-020C
Contextual Info: FX-400 Low Jitter Frequency Translator Previous Part Number FX-424 FX-400 Description The FX-400 is a precision quartz-based frequency translator used to translate an input frequency such as 8 kHz, 1.544 MHz, 2.048 MHz, 19.44 MHz etc. to any specific frequency from 1.544 MHz to 1.0 GHz. The FX-400 can perform either up or down frequency

Contextual Info: Preliminary W91030 CALLING LINE INDENTIFIER Table of ContentsG E N E R A L D E S C R IP T IO N . 2 FE A T U R E S A N D A P P L IC A T IO N S . 2

BT 1840 PA

Abstract: BTS 8800 BK 1085 LA 7770 m7 hc 08 b1 BTS 308 m7 hc 08 FX-427 60.0000 oscillator bt 137 FX
Contextual Info: FX-427 Low Jitter Frequency Translator Features • Quartz-based PLL for Ultra-Low Jitter • Frequency Translation up to 850 MHz • Accepts 4 externally-muxed clock inputs • LVCMOS/LVDS/LVPECL Inputs Compatible • Differential LVPECL Outputs • Lock Detect

Contextual Info: HB52RF1289E2-75B 1 GB Registered SDRAM DIMM 128-Mword x 72-bit, 133 MHz Memory Bus, 2-Bank Module 36 pcs of 64 M x 4 Components PC 133 SDRAM HITACHI ADE-203-1079 (Z) Preliminary Rev. 0.0 Jun. 28, 1999 Description The HB52RF1289E2 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been

Contextual Info: HB52F649E1-75B 512 MB Registered SDRAM DIMM 64-Mword x 72-bit, 133 MHz Memory Bus, 1-Bank Module 18 pcs of 64 M x 4 Components PC 133 SDRAM HITACHI ADE-203-1080 (Z) Preliminary Rev. 0.0 Jun. 28, 1999 Description The HB52F649E1 belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been developed

FL1173

Abstract: wismo 228 wismo 228 AT Command wavecom gprs wismo 228 application note WISMO 218 Wavecom AT Command 07.07 Q2406A wavecom wismo wismo quik Q2406A AT Command q2406A
Contextual Info: AT Commands For GSM/GPRS Wireless Modems Reference Guide AT Commands for GSM Wireless Modems AT Commands for GSM/GPRS Wireless Modems Reference Guide Products: MTCBA-G-F1/F2, MTMMC-G-F1/F2, and MTSMC-G-F1/F2 PN S000293C, Revision C Copyright This publication may not be reproduced, in whole or in part, without prior expressed written permission from Multi-Tech

khm 313

Abstract: MStar Semiconductor Q2406A MSTAR s6 smc general semiconductor Wavecom g850 1900 CHN 650 wiom DC MTC 250-16 FK 231 SA 220
Contextual Info: GSM/GPRS Wireless Modems AT Commands Reference Guide AT Commands for GSM Wireless Modems AT Commands for GSM/GPRS Wireless Modems Reference Guide Products: MTCBA-G-F1/F2, MTMMC-G-F1/F2, and MTSMC-G-F1/F2 PN S000293D, Revision D Copyright This publication may not be reproduced, in whole or in part, without prior expressed written permission from Multi-Tech

2am smd transistor

Abstract: ALP 102 B4 i386ex intel tc55v2325ff application note scr tic 106 TC55V2325FF ATM622 alps ALP 102
Contextual Info: ICs for Communications ATM Layer Processor ALP PXB 4350 E Version 1.1 Data Sheet 08.2000 DS 1 3;%  5HYLVLRQ +LVWRU\ &XUUHQW 9HUVLRQ  Previous Version: Preliminary Data Sheet 09.98 (DS 2 Page Page Subjects (major changes since last revision)

Cyrix 5x86

Abstract: Cyrix st5x86
Contextual Info: /= 7 S G S -T H O M S O N ^7#» IM[Kefsi@IIIUg 5iïïFi(Q W(Sg ST5x86 100 and 120 MHz 3.45 Volt 5x86 CPU PRELIMINARY DATA • 586-CLASS PERFORMANCE -100 and 120 MHz core speeds with 33,40, and 50 MHz bus options -16 KByte write-back cache - Superpipel'ring and branch prediction

H-a16t

Abstract: ADSP-2191M HA16 Peripheral interface 8255 pinout MO-205-AC adsp-2191-mbst-140
Contextual Info: a DSP Microcomputer ADSP-2191M PERFORMANCE FEATURES 6.25 ns Instruction Cycle Time, for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy to Use Algebraic Syntax Single-Cycle Instruction Execution Single-Cycle Context Switch between Two Sets of Computation and Memory Instructions

ic 8255 pll

Abstract: br-112 hack ADSP-2191M F400 HA16 104A18 PMD 1000
Contextual Info: PRELIMINARY TECHNICAL DATA a DSP Microcomputer ADSP-2191M Preliminary Technical Data ADSP-219X DSP CORE FEATURES 64K Words of On-chip RAM, Configured as 32K Words On-chip 24-bit RAM and 32K Words On-chip 16-bit RAM 6.25 ns Instruction Cycle Time Internal , for up to

TMS34061FNL

Abstract: lad1-5v TMS34070NL S3406 TL 413 SPVU001 MJ340 TA2625
Contextual Info: SM J 3 4 0 1 0 GRAPHICS SYSTEM PROCESSOR NOVEMBER 1 98 8 - • Military Temperature . . . - 5 5 ° C to 12 5°C • Instruction Cycle Time: 200 ns . . . S M J3 4010-40 160 ns . . . S M J3 4010-50 REVISED SEPTEMBER 1989 GB PACKAGE 68-PIN GRID ARRAY TOP VIEW

7 segment display 10 pin

Abstract: 312 7 Segment Display HC 5287 2 pin dip switch EJTAG Tiny Tools EJTAG Tiny Tools CPLD HSMR-C650 DS1307 PC16550DV BDMR4103
Contextual Info: TinyRISC BDMR4103 Evaluation Board User’s Guide July 2000 Order Number C14071 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

sAMSUNG CK 5081 T MANUAL

Abstract: 64 bit carry-select adder verilog code intel 915 MOTHERBOARD pcb CIRCUIT diagram inverter PURE SINE WAVE schematic diagram mercury motherboards regulator ic intel 775 motherboard diagram TRANSISTOR SUBSTITUTION DATA BOOK 1993 AW 55 IC vhdl code for cordic matlab code using 8 point DFT butterfly
Contextual Info: Stratix Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com S5V1-1.2 Copyright 2003 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

marking w25 SMD

Abstract: w6856 siemens k24 siemens k25 marking g23 SMD MARKING CODE SMD JW smd marking K23 SMD MARKING CODE abr SMD MARKING CODE g23 smd marking g24
Contextual Info: S IE M E N S ICs for Communications ATM Buffer Manager ABM PXB 4330 E Version 1.1 Preliminary Data Sheet 08.98 DS 2 This Material Copyrighted By Its Respective Manufacturer PXB 4330 E Revision History: Current Version: 08.98 P revious V ersion: P relim inary Data S heet 05.98 DS1

54tt

Contextual Info: SMJ55166 2 6 2 1 4 4 B Y 16-BI T MULTIPORT VIDEO RAM SGMS057B - APRIL 1995 - REVISED AUGUST 1995 Organization: C A S - B e f o r e - R A S C B R and - D R A M : 2 6 2 1 4 4 W o r d s x 1 6 Bits Hidden-Refresh Modes - S A M : 2 5 6 W o r d s x 1 6 Bits

7ALS04

Abstract: TMS320A2400A TMS70A2400A bu 4608 dx 74LS04P 74CS125 touch tone dialer telephone
Contextual Info: TMS70A2400A MODEM CONTROLLER OCTOBER 1988 TMS70A2400A N PACKAGE TOP VIEW • AT Command Set Interface for Industry Standard S/W Compatibility • Zero-Glue Interface To TMS320A2400A Modem DSP 40 O T C A /ff C • Auto-Answer, Auto-Dial Capability at 2400,1200, and 300 bps

tms34061fnl

Abstract: TMS34070NL TMS34061FN TMS34061 TMS4464 TMS34010 SPVU001 Texas Instruments 34010 TMS34070 TMS4461
Contextual Info: TMS34010 GRAPHICS SYSTEM PROCESSOR o I^ o 004773 JA N U A R Y 1 9 8 6 - REVISED JULY 1 9 8 7 FN PACKAGE Instruction Cycle Time: - 16 0 ns . . . T M S 34 01 0-50 - 2 0 0 ns . . . (T M S 3 4 01 0-40) (TOP VIEW ) I il i l 9 Pixel Processing, XY Addressing, and

Contextual Info: "1 T l-C u b e IQX Family Data Sheet Features Description • SRAM-based, in-system programmable • Switch Matrix - Non-Blocking - Identical and predictable delays - One-to-one, one-to-many and many-toone connections • I/O Ports - Individually programmable as

MOR56

Abstract: mot schematic M0P41 compal m0r11 AM251S EL 817 c321 SS145 SS97 ss129
Contextual Info: Model Name: N20U PCB No: LA542 Revision: 1A Model Name: N20U2 PCB No: LA542 Revision:3A N20U BLOCK DIA GRAM CPU DECOUPING PULL UP/FDOW N GEYSERVILLE Coppermine Geyserville uBGA2/uPGA2 CPU CLOCK ICS9248-92 PAGE 11 PAGES PAGE 3,4 LCD & CRT PC I/ISA PULL UP/DOWN

Contextual Info: ANALOG DEVICES DSP Microcomputer ADSP-21065L SDRAM Controller for Glueless Interface to Low Cost External M em ory @ 66 MHz 64M Words External Address Range 12 Programmable I/O Pins and T w o Timers w ith Event Capture Options Code-Com patible w ith ADSP-2106x Family

SPVB066C

Abstract: TMS34010 TMS340SDK-PC spvu SPVU001 SPVU001B t4035
Contextual Info: TMS34010 GRAPHICS SYSTEM PROCESSOR SPVS002C - • Instruction - 132 ns - 160 ns - 200 ns Cycle . . . TOP VIEW r- ^ Fully Programmable 32-Bit General-Purpose Processor with 128-Megabyte Address Range • Pixel Processing, XY Addressing, and Window Checking Built into the Instruction

TDK 73M2910-IG

Abstract: 2910A ISO101 73M2910-IA 73M2910-IG ad550 Aromat RD hdlc 033H 73M2910-IGT
Contextual Info: TSC 73M2910/2910A Microcontroller October 1996 FEATURES The TSC 73M2910/2910A high performance microcontroller is based on the industry standard 8-bit 8032 implemented in TDK Semiconductor Corporation’s advanced submicron CMOS process. The processor has the same attributes of the 8032