TAA 380 Search Results

H5128

Abstract: CY27H512
Contextual Info: PRELIMINARY Functional Description Features D D D D D Ċ Ċ Ċ Ċ High speed tAA = 25 ns max. commercial tAA = 35 ns max. (military) Low power 275 mW max. Less than 85 mW when deselected ByteĆwide memory organization 100% reprogrammable in the windowed package

CY27H512

Contextual Info: fax id: 3020 1CY 27H5 12 CY27H512 PRELIMINARY 64K x 8 High-Speed CMOS EPROM Features • CMOS for optimum speed/power • High speed — tAA = 25 ns max. commercial — tAA = 35 ns max. (military) • Low power — 275 mW max. — Less than 85 mW when deselected

LC 7258

Contextual Info: CYPRESS • CMOS for optimum speed/power • High speed — tAA = 25 ns max. com m ercial — tAA = 35 ns max. (military) • Low power — 275 mW max. — Less than 85 mW when deselected Byte-wide mem ory organization 100% reprogram m able in the windowed package

CY27H512-25JC

Abstract: CY27H512 CY27H512-25ZC 27H512-25 27H512-30 H5121 H5128
Contextual Info: 1CY 27H5 12 CY27H512 PRELIMINARY 64K x 8 High-Speed CMOS EPROM Features • CMOS for optimum speed/power • High speed — tAA = 25 ns max. commercial — tAA = 35 ns max. (military) • Low power — 275 mW max. — Less than 85 mW when deselected • Byte-wide memory organization

h2566

Abstract: H2567 H2563 H2565 H256 H2568 H256-4 CY27H256 CY27H256-25JC CY27H256-25ZC
Contextual Info: fax id: 3014 1CY 27H2 56 CY27H256 32K x 8 High-Speed CMOS EPROM Features • CMOS for optimum speed/power • High speed — tAA = 25 ns max. commercial — tAA = 35 ns max. (military) • Low power — 275 mW max. — Less than 85 mW when deselected • Byte-wide memory organization

C520

Abstract: ar1318 CY27H512 CY27H512-25JC CY27H512-25ZC CY27H512-30JC
Contextual Info: ,.V. Ï. Ï. V. ^ynr' Æ CYPRESS • CMOS fo r optimum speed/power • High speed — tAA = 25 ns max. comm ercial — tAA = 35 ns max. (military) • Low power — 275 mW max. — Less than 85 mW when deselected Byte-wide memory organization 100% reprogramm able in the windowed package

Contextual Info: 7c109A: Thursday, November 19,1992 Revision: Thursday, February 18,1993 CY7C109A PRELIMINARY CYPRESS SEMICONDUCTOR 128K x 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW

Contextual Info: 7C101A: 11-25-91 Revision: Thursday, February 18,1993 CY7C101A CY7C102A k ' Vwt S3 « 3 PRELIMINARY 7J= CYPRESS SEMICONDUCTOR 256K x 4 Static RAM with Separate I/O Features Functional Description • Highspeed — tAA = 12 ns • Transparent write 7C101A

CY7C1018BV33

Abstract: CY7C1018CV33 CY7C1018CV33-10VC CY7C1018CV33-12VC CY7C1018CV33-12VXI CY7C1018CV33-15VXC
Contextual Info: CY7C1018CV33 128K x 8 Static RAM Features device has an automatic power-down feature that significantly reduces power consumption when deselected. • Pin- and function-compatible with CY7C1018BV33 • High speed — tAA = 10 ns • CMOS for optimum speed/power

Contextual Info: CY7C1021D PRELIMINARY 1-Mbit 64K x 16 Static RAM Features automatic power-down feature that significantly reduces power consumption when deselected. • Pin- and function-compatible with CY7C1021B • High speed — tAA = 10 ns • CMOS for optimum speed/power

CY7C1018BV33

Abstract: CY7C1018CV33 CY7C1018CV33-10VC CY7C1018CV33-12VC CY7C1018CV33-12VXI CY7C1018CV33-15VXC
Contextual Info: CY7C1018CV33 128K x 8 Static RAM Features device has an automatic power-down feature that significantly reduces power consumption when deselected. • Pin- and function-compatible with CY7C1018BV33 • High speed — tAA = 10 ns • CMOS for optimum speed/power

CY7C1019CV33-15VC

Abstract: CY7C1019CV33-12ZXC CY7C1019BV33 CY7C1019CV33 CY7C1019CV33-10VC CY7C1019CV33-10ZXC CY7C1019CV33-10ZXI CY7C1019CV33-12VC CY7C1019CV33-12ZC
Contextual Info: CY7C1019CV33 128K x 8 Static RAM Features device has an automatic power-down feature that significantly reduces power consumption when deselected. • Pin and function compatible with CY7C1019BV33 • High speed — tAA = 10 ns • CMOS for optimum speed/power

Contextual Info: PRELIMINARY CY7C1020D 512K 32K x 16 Static RAM Features automatic power-down feature that significantly reduces power consumption when deselected. • Pin- and function-compatible with CY7C1020B • High speed — tAA = 10 ns • CMOS for optimum speed/power

Contextual Info: CY7C1019CV33 128K x 8 Static RAM Features device has an automatic power-down feature that significantly reduces power consumption when deselected. • Pin and function compatible with CY7C1019BV33 • High speed — tAA = 10 ns • CMOS for optimum speed/power

CY7C1399B

Abstract: CY7C1399D
Contextual Info: CY7C1399D PRELIMINARY 256K 32K x 8 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C1399B • Single 3.3V power supply • Ideal for low-voltage cache memory applications • High speed — tAA = 8 ns • Low active power

CY7C1399B

Abstract: CY7C1399D TRC40
Contextual Info: CY7C1399D PRELIMINARY 256K 32K x 8 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C1399B • Single 3.3V power supply • Ideal for low-voltage cache memory applications • High speed — tAA = 8 ns • Low active power

CY7C1069AV33

Contextual Info: CY7C1069AV33 2M x 8 Static RAM Features Functional Description • High speed ❐ tAA = 10 ns The CY7C1069AV33 is a high performance complementary metal oxide semiconductor CMOS static RAM organized as 2,097,152 words by 8 bits. Writing to the device is accomplished

Contextual Info: CY7C107BN 1M x 1 Static RAM Features Functional Description • High speed ❐ tAA = 15 ns ■ CMOS for optimum speed/power ■ Automatic power down when deselected ■ TTL-compatible inputs and outputs The CY7C107BN is a high performance CMOS static RAMs

4kx4 ram

Abstract: CY7C168A 7C168A 7C168A-45
Contextual Info: CY7C168A 4Kx4 RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — tAA = 15 ns • Low active power — 633 mW • Low standby power — 110 mW • TTL-compatible inputs and outputs

CY7C1061DV33-10BVXI

Abstract: CY7C1061DV33 CY7C1061DV33-10ZXI TSOP 54 thermal resistance CY7C1061 TSOP II 54 Package
Contextual Info: CY7C1061DV33 PRELIMINARY 16-Mbit 1M x 16 Static RAM Features Functional Description • High speed The CY7C1061DV33 is a high-performance CMOS Static RAM organized as 1,048,576 words by 16 bits. — tAA = 10 ns Writing to the device is accomplished by enabling the chip

CY7C1011DV33-10ZSXI

Contextual Info: CY7C1011DV33 2-Mbit 128K x 16 Static RAM Features Functional Description • Pin-and function-compatible with CY7C1011CV33 • High speed The CY7C1011DV33 is a high-performance CMOS Static RAM organized as 128K words by 16 bits. — tAA = 10 ns • Low active power

Contextual Info: CY7C1062DV33 PRELIMINARY 16-Mbit 512K X 32 Static RAM Features Functional Description • High speed The CY7C1062DV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. — tAA = 10 ns Writing to the device is accomplished by enabling the chip

Contextual Info: CY7C1062DV33 PRELIMINARY 16-Mbit 512K X 32 Static RAM Features Functional Description • High speed The CY7C1062DV33 is a high-performance CMOS Static RAM organized as 524,288 words by 32 bits. — tAA = 10 ns Writing to the device is accomplished by enabling the chip

Contextual Info: CYPRESS MbE SEMICONDUCTOR BSö^bba aaati7Gt. 3 D CY7C1009 ADVANCED INFORMATION “ CYPRESS SEMICONDUCTOR 128K x 8 Static R/W RAM Functional Description Features • Highspeed — tAA = 15 ns • CMOS for optimum speed/power • Low active power — 825 mW