TA 8742 IC Search Results

CONTROLLER

Abstract: intel 8742 D 8742 8742 intel 8742 8742 UNIVERSAL PERIPHERAL INTERFACE 8 BIT MICROCONTROLLER 8741A 8742 microcontroller UPI-41 MCS-51
Contextual Info: 8742 UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER Y 8742 12 MHz Y Pin Software and Architecturally Compatible with 8741A Y 8-Bit CPU plus ROM RAM I O Timer and Clock in a Single Package Y 2048 x 8 EPROM 128 x 8 RAM 8-Bit Timer Counter 18 Programmable I O

Contextual Info: in tJ . 8742 UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER • 8742: 12 MHz DMA, Interrupt, or Polled Operation Supported ■ Pin, Software and Architecturally Compatible with 8741A Fully Compatible with all Intel and Most Other Microprocessor Families

Contextual Info: inU 8742 UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER • DMA, Interrupt, or Polled Operation Supported ■ 8742: 12 MHz ■ Pin, Software and Architecturally Compatible with 8741A ■ Fully Compatible with all Intel and Most Other Microprocessor Families

p26ad

Contextual Info: intpl, 8742 UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER • DMA, Interrupt, or Polled Operation Supported ■ 8742: 12 MHz ■ Pin, Software and Architecturally Compatible with 8741A ■ Fully Compatible with all Intel and Most Other Microprocessor Families

D 8742

Abstract: intel 8742 UC 8642 S 8742 4110I 8642 intel eprom 8243
Contextual Info: in te i 8742 UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER • 8742: 12 MHz ■ DMA, Interrupt, or Polled Operation Supported ■ Pin, Software and Architecturally Compatible with 8741A ■ Fully Compatible with all Intel and Most Other Microprocessor Families

ta 8742 IC

Abstract: 80836DX 80286 mouse 386R sl90 SL9030 SL9010
Contextual Info: y/a SL9095 Power M anagement Unit PRELIMINARY FEATURES • Supports 80286, 80386SX, 80386DX, and 80486 Page Mode or Cache-based Laptop designs. • IBM PC/AT Compatible. • Software Programmable Power Management Unit. Provides Individual On/Off Control. • Compatible with all CPU Clock Rates.

Contextual Info: in t e r UPItm-41, 42:8041AH/8042AH/8741AH/8742AH UNIVERSAL PERIPHERAL INTERFACE 8-BIT SLAVE MICROCONTROLLER • UPI-41: 6 MHz; UPI-42: 12.5 MHz ■ Fully Compatible with all Intel and Most Other Microprocessor Families ■ Pin, Software and Architecturally

80486 ADDRESSING MODES EXAMPLES

Abstract: weitek 4167 S12M3 WD6000 weitek 0070H cdse intel 80386dx WD33C93A 80386DX
Contextual Info: WD6000 INTRO DUCTIO N 1.0 INTRODUCTION 1.1 DESCRIPTION 1.2 As part of the Western Digital Micro Channel compatible chip sets WD6500, WD6400SX, W D6400SX/LP , the WD6000 CPU and Peripheral Control Logic integrated circuit sig­ nificantly facilitates the design and implementation

INTEL 8041

Abstract: mbl8742h MBL8742 intel 8742 lrj 6d MBL8041 fx3 pin map MBL8742N
Contextual Info: FUJITSU NMOS UNIVERSAL PERIPHERAL INTERFACE 8-BIT M ICROCOM PUTER MBL8742H/N October 1986 Edition t .0 D ESC RIPTIO N The Fujitsu MBL8742 Universal Peripheral Interface UPI is an 8-bit m icro­ com puter that uses a 2K * 8-bit E lectrically Programmable Read O nly Memory

intel 386 motherboard diagram

Abstract: 386SX chipset intel 82395sx 82395sx Intel 386 DX 82395dx Intel CPU 386
Contextual Info: SbE D in te ! • 4Ö2L17S DllS3b2 4T4 ■ I T L 1 INTEL CORP UP/PRPHLS 82311 ' •5 2 -3 > 3 -1 3 HIGH INTEGRATION Micro Channel COMPATIBLE PERIPHERAL CHIP SET Flexible Memory Architecture Support — Up to 4 Banks of Interleaved Page Memory — 256K, 1M, 4M DRAM Support

82C206

Contextual Info: 47E D SIEMENS • flaasbos 0031S7D 1 « S I E G SIEMENS AKTIE NGE SELLSCHAF -rs a -3 S -5 5 SAB 82C211 CPU/Bus Controller of Siemens PC-AT Chipset Advance Information 117 3.90 47E » ■ Ö 535b05 0031571 SIEMENS AKTIENGESELLSCHAF -•

Contextual Info: Datasheet • March 1997 005002b 0 0 2 S2 0 M 745 ■ microelectronics group Lucent Technologies Bell Labs Innovations JW030-Series Power Modules: 36 Vdc to 75 Vdc Inputs; 30 W Features ■ Small size: 61 mm x 58 mm x 12.7 mm 2.40 in. x 2.28 in. x 0.50 in.

yg 2822

Abstract: RAS 0510 cs8221 neat Waukesha 6670 82C631 82c211 2021G 82C206 CHIPset for 80286 REG62
Contextual Info: PRELIM INARY C S 8221 NEW ENHANCED AT NEAT DATA BOOK 8 2 C 2 1 1 / 8 2 C 2 1 2 / 8 2 C 2 1 5 / 8 2 C 2 0 6 (IPC ) CHIPSet™ 100% IBM™ PC/AT Compatible New En­ hanced CHIPSet™ for 12MHz to 16MHz systems Supports 16MHz 80286 operation with only 0.5-0.7 wait states for 100ns DRAMs and 12

r2kl

Abstract: tea 1601 t NEC 2561 80286 address decoder tea 1601 block diagram of mri machine 82C206 82c206 ipc 82C631 CS6221
Contextual Info: glîü S {9 ¡1 c n » HH* PRELIM INARY r ^ . CS8221 NEW ENHANCED AT NEAT " DATA BOOK 8 2 C 2 1 1 /8 2 C 2 1 2 /8 2 C 2 1 5 /8 2 C 2 0 6 (IPC) CHIPSet | • 100% IBM™ PC/AT Compatible New Enhanced CHIPSet™ for 12MHz to 16MHz systems ■ Software Configurable Command Delays,

JW030A1-M

Abstract: JW030B-M JW030C1-M JW030F-M YIO 98 JW030A-M JW030C-M JW030D-M JW030G-M 8740c
Contextual Info: Data Sheet March 26, 2008 JW030-Series Power Modules: 36 Vdc to 75 Vdc Inputs; 30 W Features n The JW030-Series Power Modules use advanced, surfacemount technology and deliver high-quality, compact, dc-dc conversion at an economical price. n Low output noise

Contextual Info: Data Sheet March 26, 2008 JW030-Series Power Modules: 36 Vdc to 75 Vdc Inputs; 30 W Features n The JW030-Series Power Modules use advanced, surfacemount technology and deliver high-quality, compact, dc-dc conversion at an economical price. n Low output noise

GT1 X02

Abstract: SiS chipset 486 82c681 ram 2112 SIS chipset for 486 opti 486 chipset 82C631 80487SX HD3112 sd338
Contextual Info: i »9? OPTÎ-386/486WB EISA Chipset 82C681/82C682/82C686/82C687 EBC/MCC/ISP/DBC D A T A B O O K Preliminary Version 1.3 / Powered by ICminer.com Electronic-Library Service CopyRight 2003 OPTÏ-386/486WB EISA DATABOOK PRELIMINARY Version 1.3 Disclaimer This specification is subject to change without notice. OPTi, Incorporated assumes no

ma10c

Contextual Info: Oec î j n MOSEL MS400 486SX / 486DX Single Chip AT SEPTEMBER 1991 PRELIMINARY FEATURES DESCRIPTION • Direct Interface to 486SX/487SX or 486DX at speeds from 20-33MHz The MS400 is a highly integrated single chip AT optimized specifically for 486 CPUs. Emphasis has

Contextual Info: SIEM EN S SAB 82C212 Page/Interleave Memory Controller of Siemens PC-AT Chipset Advance Information 157 3.90 SAB 82C212 • Higher perform ance of DRAM accesses using page m ode access together with a interleaved mem ory accessing scheme • Supports up to 8 MByte on-board

386DX chipset

Contextual Info: ELITE 80386 PC/AT EAGLE CHIPSET e88C311 & e88C312 An Overview The Eagle 386 AT chip set is designed for high perform ance PC-ATs w ith 80386DX running at 20/2 5 /3 3 MHz. Major features of the Eagle chip set include: • 100% IBM PC-AT com patible 386DX chip set

Contextual Info: 47E D SIEMENS • fi23SbOS 0031bl0 <3 ■ SIEG SIEMENS AKTIENGESEL LSCHAF SAB 82C212 Page/Interleave Memory Controller of Siemens PC-AT Chipset Advance Information 157 3.90 M7E » I fl2 3 5 b 0 5 G 0 3 1 b ll SIEMENS AKTIENGESELLSCHAF □ ■ S IE G SAB 82C212

82C811

Abstract: 82C812 neatsx 82C631 chipset 82c206 386sx chipset 82c211 HA12013 ADTL 84 LIM EMS 4.0
Contextual Info: •■ ■« \ . n « ai it a ■■ H H Preliminary i r 3 TM CS 8281 NEATsx U 12/89 A T A M I M D D A v STK#1 0 0 3 3 -0 0 2 R ev 2 . 0 A I / u r v CS8281 Data Book \ - n Preliminary i r s COPYRIGHT NOTICE Copyright o 1989, Chips and Technologies, Inc. ALL RiGHTS RESERVED,

GC102

Abstract: 8088 motherboard schematics ASC 8.000MHz crystal oscillator cpu 416-2 DP CQA03 coa030 sd 7406 ero 1818 74ALS245 TI HA 7406
Contextual Info: G-TUO -CE} INC D 5 D E I 3 7 7 7 4 7 S OGGOOt ,4 S I i i u i u i 7v ; c i o 2 12/16MHz PC/AT Compatible C h ip set Features Description • Highly Integrated PC/AT Com­ patible Three Chip Set. The GC101/GC102 is a fully IBM PC/AT compatible chip set support­

T-538

Abstract: K1557 82c311 82C316 i80387 LG variable frequency drive is3 82C811 hp 1502 vga 82c315 82C81
Contextual Info: CS8233 PEAK/386 AT CHIPSet PEAK/386 AT December 1990 P R E L I M I N A R Y v -ir i i r b Copyright Notice Software Copyright 1990, CHIPS and Technologies, Inc. Manual Copyright © 1990, CHIPS and Technologies, Inc. a 11 r t J .1 r v ig U L » d _ v 6U .