T8952 Search Results

PAIRGAIN HDSL PINOUT

Abstract: rcv101 DFE equalizer error filter SCRAMBLE Bt8952EPJ
Contextual Info: Preliminary Information This docum ent contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. t8952 HDSL Transceiver The t8952 is a High-Bit-Rate Digital Subscriber Line H D SL Transceiver su p ­

mitel hdlc

Abstract: T8972
Contextual Info: ISO-CMOS ST-BUS FAMILY MITEL F e atu res T8952B HDLC Protocol Controller _ ISSUE6_March 1997 Form ats data as per X.25 CCITT level-2 standards G o-Ahead sequence generation and detection S ingle byte address recognition

T8952

Abstract: BT8952EPJ40
Contextual Info: Overview System Overview The t8952 H D SL transceiver is an integral com ponent o f Brooktree's HD SL chipset. System perform ance of the chipset allows 2-pair T l, 2-pair E l, and 3pair E l transm ission. The m ajor building blocks o f a typical H D SL T 1/E 1 term i­

Contextual Info: MH89760 T1/ESF Framer & Interface S T -B U S " F A M IL Y M IT E L 9 1 6 1 -0 0 2 -064-N A _ ISSUE 5_ O cto ber 1989 Features • • • • • • • • • • • • • • • C o m p le te in te rfa c e t o a b id ire c tio n a l T1 lin k .

RCA SK CROSS-REFERENCE

Abstract: power switch transistor dk51 SAB8051A-P all 89c51 microcontroller references book DL1414 Free Projects with assembly language 8086 Atmel PART DATE CODE at25c04 at89c52 base clock circuit diagram free assembly language and assembler of AT89C52 programmer p87c51
Contextual Info: MICROCONTROLLER DATA BOOK Atmel Corporation Microcontroller Data Book October 1995 ¿[¡¡¡EL is the registered trademark of Atmel Corporation 2125 O’Nel Drive, San Jose, CA 95131 Im portant N otice Atmel guarantees that its circuits will be free from defects of material and workmanship under

Contextual Info: | W l| - r P | IV ll E . I- MT8977 J1/ESF Framer Circuit A C CU N ET T 1.5 ISO -CM O S ST-BUS'" FAM ILY Preliminary Information 9161-002-164-N A_ ISSUE 1_ July 1993 Features • D3/D4 o r ESFfram in g and SLC-96 com patible

Contextual Info: MITEL* MH89790 CEPT PCM 30/CRC-4 Framer & Interface ST -B U S" F A M IL Y Prelim inary In fo rm a tio n 9161-002-080-N A ISSUE 4 Features Pin Connections Com plete prim ary rate 2048 kbit/s CEPT transceiver w ith CRC-4 option. Selectable HDB3 or A M I line code.

HT 8870

Abstract: MH89790 MB601 MT8952 MT8979 MT8980 siemens N30 m33 ferrite AMI siemens
Contextual Info: MITEL* MH89790 CEPT PCM 30/CRC-4 Framer & Interface ST-BUS" FAM ILY Preliminary Information 9 1 6 T -0 0 2 -0 8 0 -N A Features Com plete primary rate 2048 kbit/s CEPT transceiver with CRC-4 option. Selectable HDB3 or A M I line code. Tx and Rx fram e and multiframe

Contextual Info: M ITEL ISO-CMOS ST-BUS FAM ILY T8952B HDLC Protocol Controller 9161-002-070-NA Features • ISSUE 4 September 1988 Ordering Information Formats data as per X.25 CCITT level-2 standards Go-Ahead sequence generation and detection Single byte address recognition