T5LC1001 Search Results

Contextual Info: PRELIMINARY MICRON T5LC1001 1 MEG X 1 SRAM SlMICCNDUÍTO* IN C I SRAM 1 MEG X 1 SRAM LOW VOLTAGE PIN ASSIGNMENT Top View • AU I / O pins are 5V tolerant • High speed: 1 5 ,1 7 ,2 0 and 25ns • High-perform ance, low-power, CM OS double-metal process

201A3

Contextual Info: ADVANCE M T5LC 1001 1 MEG X 1 SRAM |U|IC=RON SRAM 1 MEGx 1 SRAM LOW VOLTAGE • All I/O pins are 5V tolerant • High speed: 15,17,20, 25, 35 and 45ns • High-performance, low-power, CMOS double-metal process • Single +3.3V ±0.3 power supply • Easy memory expansion with CE option

RC145

Contextual Info: PRELIMINARY M T 5 L C 1 001 1 MEG X 1 SRAM I^ IIC R O N SRAM 1 MEG X 1 SRAM LOW VOLTAGE • All I / O pins are 5V tolerant • High speed: 1 5 ,1 7 ,2 0 and 25ns • High-perform ance, low-power, CM OS double-metal process • Single +3.3V ±0.3 power supply