T54LS73A Search Results

Contextual Info: s g S-xHOnsON 0?E D 712^23? 001ST74 4 | OW POWER SCHOTTKY . . . * ^ 2 INTEGRATED CIRCUITS 6 7C 16099 'p 4 4 > - 0 7 - 0 7 PRELIMINARY DATA DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DESCRIPTION The T54LS73A/T74LS73A is a dual flip-flop with in­ dividual J, K, clear and clock inputs. When the clock

T54LS107AD2

Contextual Info: PRELIMINARY DATA DUAL JK FLIP-FLOP DESCRIPTION The T54LS107A/T74LS107A is a Dual JK flip-flop with individual J, K, clock pulse and direct Reset inputs. The HIGH-to-LOW transition of the clock ini­ tiates output changes. A LOW signal on CD input overrides the other inputs and makes the Q out­

165-V4

Abstract: 185ra
Contextual Info: S G S-THOHSON D7E D I 7 ^ 2 3 7 0Qlt,020 S C 16148 D r-4&~ J 7-¿>7 LOW POWER SGHOTTKY T54LS107A T74LS107A INTEGRATED • CIRCUITS PRELIMINARY DATA DUAL JK FLIP-FLOP DESCRIPTION The T54LS107A/T74LS107A is a Dual JK flip-flop with individual J, K, clock pulse and direct Reset