T400 CLOCK Search Results

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

AD T805

Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

LSE B3 transformer how to test

Abstract: ATIC 39 b4 LSE B3 transformer LSE B9 EA135 T400 600 62310 T1/ATIC 39 b4
Contextual Info: Standard Product D ecem ber 1995 LXT400 All Rate, Extended Range Switched 5 6 / DDS Transceiver T he L X T400 is an integrated line interface circuit for Sw itched 56 SW 56 and Digital Data Service (DDS), com patible with any com bination o f 19 to 26 A W G cable.

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

CQ 2AF1

Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal

specifications of tdr

Abstract: Inmos t805 IMS processor
Contextual Info: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

sbl 20100

Abstract: T425-X25S MEMAD11 inmos transputer T425
Contextual Info: ^•7 # DMD g(fii ilL[l(gTO©[i!!in(gI / = T S G S -T H O M S O N IM S T 4 2 5 32-bit transputer FEATURES ■ 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414

inmos T400

Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Contextual Info: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

T400 600

Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

KT-BATT-12

Abstract: TR1675
Contextual Info: A Tyco International Company DATa sheet KT-400 Powerful, Ethernet-Ready Four-Door Controller Features That Make a Difference Supports four readers and expand inputs, outputs, and relays with the addition of expansion modules Onboard Ethernet 128-bit AES-encrypted communication with the

transistor t342

Abstract: W68A T400 clock tlku AC1O f AC10 C1995 DS3875 DS3884A DS3885
Contextual Info: March 1994 DS3875 Futurebus a Arbitration Controller MIL-STD-883 General Description For a complete description of operation please refer to the commercial datasheet The DS3875 Futurebus a Arbitration Controller is a member of National Semiconductor’s Futurebus a chip set designed

xr-1091

Contextual Info: EXAR XR-1091 Graphic Equalizer Display Filter GENERAL INFORMATION PIN ASSIGNMENT The XR-1091 is an eight output switched-capacitor band pass filte r de dicated for use in audio a p p lica tio n s. Seven of the o u tp u ts are from bandpass filters spaced 1 1/2 octaves apart starting

brq ti

Abstract: BRQ TI 78
Contextual Info: DS3875 DS3875 Futurebus+ Arbitration Controller MIL-STD-883 Literature Number: SNOS716 March 1994 DS3875 Futurebus a Arbitration Controller MIL-STD-883 General Description For a complete description of operation please refer to the commercial datasheet

Contextual Info: nicfe/ FAST CMOS INVERTING BUFFER/ CLOCK DRIVER IDT49FCT1806T Integrated Device Technology, Inc. FEATURES: 0.5 MICRON CMOS Technology TTL compatible inputs and outputs TTL level output voltage swings High drive:-32m A I o h , +48mA I o l Two independent output banks with 3-state control

Contextual Info: FAST CM OS BUFFER/CLOCK DRIVER DESCRIPTION: FEATURES: • • • • • • • • • • • IDT49FCT3805/A The FCT3805/A is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its

C819

Abstract: MH800 MH802 J8041 TIBUG 43P105 MSP430 ultrasound L-803 C133 R120
Contextual Info: INPUT VCA 1 INPUT VCA 1 PAGE 1 INPUT VCA 2 INPUT VCA 2 PAGE 2 INPUT VCA 3 INPUT VCA 3 PAGE 3 INPUT VCA 4 INPUT VCA 4 PAGE 4 ADC ADC CLOCK DISTRIBUTION CLOCK DISTRIBUTION PAGE 5 COMMUNICATIONS COMMUNICATIONS PAGE 7 POWER DISTRIBUTION POWER DISTRIBUTION PAGE 8

Contextual Info: IDT74FCT3807/A 3.3V CMOS 1-TO-10 CLOCK DRIVER In te g rate d D ev ice T ech n ology , Inc. FEATURES: DESCRIPTION: • 0 .5 M IC R O N C M O S Technology • G u aran teed low skew < 3 5 0 p s m ax. • V ery low duty cycle distortion < 3 5 0p s (m ax.) •

flyback transformer philips TV EHT AT2097

Abstract: TDA8447 TU305B2 AT2097 TRANSISTOR D405 flyback transformer philips AT2097 BC548 TRANSISTOR SMD IC2 7812 D409 transistor UC3843 SMD
Contextual Info: APPLICATION NOTE Circuit description of CCM420 monitor AN97032 Philips Semiconductors Circuit description of CCM420 monitor Application Note AN97032 Abstract 2 The CCM420 demo monitor is a full I C-bus controlled 17” colour monitor. It’s extensive geometry control and

Contextual Info: IDT74FST3125 4-BIT BUS SWITCH ï r t e g i a t e d D e v iæ T e c h n o lo g y , ]n c The FST3125 belong to IDT's fam ily of Bus switches. Bus switch devices perform the function of connecting or isolating tw o ports w ithout providing any inherent current sink or source

2764-3

Contextual Info: IDT74FST3390 IDT74FST32390 PRELIMINARY OCTAL 2:1 MULTIPLEXER BUS SWITCH H h tegiated D e v iz e T e c h n o lo g y , l i e . FEATURES: • Bus switches provide zero delay paths • Extended commercial range of -^0 °C to +85°C • Low switch on-resistance: