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    T373T Search Results

    T373T Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    CY74FCT373TSOC
    Texas Instruments Octal Transparent D-Type Latches with 3-State Outputs 20-SOIC -40 to 85 Visit Texas Instruments Buy
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    T373T Price and Stock

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    Integrated Device Technology Inc 74FCT373TSO

    Latch Transparent 3-ST 8-CH D-Type 20-Pin SOIC
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    Bristol Electronics 74FCT373TSO 521
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    Bristol Electronics PI74FCT373TSA 152
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    Cypress Semiconductor CY74FCT373TSOC

    Latch Transparent 3-ST 8-CH D-Type 20-Pin SOIC Tube
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    Bristol Electronics CY74FCT373TSOC 42
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    Bristol Electronics IDT74FCT373TSO 28
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    Component Electronics, Inc IDT74FCT373TSO 727
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    Texas Instruments CY74FCT373TSOC

    Latch 8 Bits D-Type Transparent Latch 5V 20-SOIC Tube
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    Rochester Electronics CY74FCT373TSOC 22,275 1
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    Ameya Holding Limited CY74FCT373TSOC 10,950
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    T373T Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: CY54/T373T PVDDT7CC CY54/74FCT573T 8-BIT LATCHES FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of Equivalent and FCT functions


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    cy54/74fct373tcy54/74fct573tfct373tfct573t+4mil-std-883373t/573t373at/573at373ct/573ct PDF

    Contextual Info: i :Sï¥NN^ FAST CMOS BUS INTERFACE LATCHES | dt IDT54/74FCT841AT/BT/CT/DT Untegiated D ev ize T ech n ology, l i e . FEATURES: DESCRIPTION: • Common features: The FCT8xxT series is built using an advanced dual metal CMOS technology. The FCT8xxT bus interface latches are designed to elim i­


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    idt54/74fct841at/bt/ct/dtt841t10-bitt373t+4841bt841ct841dtmil-std-883 PDF

    6 input or gate

    Abstract: t177 SLA847 986 t04 B8237 B8250 Series A138G2 19275 resistor ssc300 S-MOS asic
    Contextual Info: S-H 0 S SYSTEMS INC SbE » • 7ei3StiOti ÜDDlM'ia 076 «SIIO SLA8000 HIGH SPEED CMOS GATE ARRAY ■ DESCRIPTION The SLA8000 Series consists of a group of 13 high speed, sea-of-gates CMOS gate arrays. The series is fabricated utilizing our state-of-the-art 1.2 micron silicon gate technology. Gate counts range from 5K to 80K


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    sla8000sla827ssla837ssla847s+14sla860ssla872ssla890ssla86es6 input or gatet177sla847986 t04b8237b8250 seriesa138g219275 resistorssc300s-mos asic PDF

    Contextual Info: CY74FCT2373T 8-BIT LATCH WITH 3-STATE OUTPUTS SCCS039B – SEPTEMBER 1994 – REVISED OCTOBER 2001 D D D D D D D D D D Q OR SO PACKAGE TOP VIEW Function and Pinout Compatible With the Fastest Bipolar Logic 25-Ω Output Series Resistors Reduce Transmission-Line Reflection Noise


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    cy74fct2373tsccs039b000-va114-a+3a115-a12-ma15-ma PDF

    B8228

    Contextual Info: kfoEC S 6 Í?9C S-MOS S Y T E M ASIC S Preliminary A Seiko Epson Affiliate SLA10000 AUGUST 1990 HIGH SPEED CMOS GATE ARRAYS DESCRIPTION FEATURES The S-MOS SLA10000 series is a channeMess gate • .76 micron drawn channel length N-Channel array manufactured on S-MOS’ state-of-the-art 0.8


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    sla10000b8228 PDF

    CD74FCT2573

    Abstract: CD74FCT257
    Contextual Info: T373T, CD74FCT533T, CD74FCT573T, CD74FCT2373T, CD74FCT2573T December 1996 Fast CMOS Octal Transparent Latches Ordering Information Features • Advanced 0.8 micron CMOS Technology TEM P. RANGE • Pin Compatible with Bipolar FAST Series at a Higher


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    S-MOS navnet

    Abstract: S-MOS asic B16c F1841
    Contextual Info: DEC 2 3 i32S _ S-MOS S Y S T E M S • ■ ASIC _ A Seiko Epson Affiliate SLA9000 OCTOBER 1990 HIGH SPEED CMOS GATE ARRAYS DESCRIPTION The S-MOS SLA9000 series is a family of sea-of-gates • 1.0 micron drawn channel length N-Channel


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    sla9000s-mos navnets-mos asicb16c+1f1841 PDF

    T157WG

    Abstract: S-MOS navnet A138G2 t177 4-bit full adder using nand gates and 3*8 decoder 6 input or gate SLA1024 T161RE
    Contextual Info: S-M 0 S S Y S T E M S INC 5bE J> m 7 ci3 Z eÏQ'l GG01522 fc.35 H S I 1 0 SLA1 OOOO Series HIGH SPEED CMOS GATE ARRAYS • DESCRIPTION The S-MOS SLA10000 series is a channel-less gate array manufactured on S-MOS’ state-of-the-art 0.8 micron double-metal SiCMOS process. The series consists of 11 arrays ranging from 9,000 to 101,800 usable gates and


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    gg01522sla10000ssc5000b8259+11b8237b82284b8255t157wgs-mos navneta138g2t1774-bit full adder using nand gates and 3*8 decoder6 input or gatesla1024t161re PDF

    S33T

    Contextual Info: INTEGRATED DEVICE MÖB5771 0010557 3b2 5ñE D FAST CMOS OCTAL TRANSPARENT LATCHES IIDT IDT54/T373T/AT/CT/DT IDT54/74FCT533T/AT/CT IDT54/74FCT573T/AT/CT/DT = < ^ * 7 - 1 | - FEATURES: DESCRIPTION: • Fastest C M O S logic family available • Std., A, C, and D speed grades with 3.8ns tPD


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    b5771idt54/74fct373t/at/ct/dtidt54/74fct533t/at/ctidt54/74fct573t/at/ct/dt+1s33t PDF

    Contextual Info: CY54FCT573T, CY74FCT573T 8-BIT LATCHES WITH 3-STATE OUTPUTS SCCS068 – OCTOBER 2001 D D D D D D D D D D Function and Pinout Compatible With FCT and F Logic Reduced VOH Typically = 3.3 V Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for


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    cy54fct573tcy74fct573tsccs068000-v+4a114-aa115-a32-ma12-ma PDF

    Contextual Info: CY54/T373T CY54/74FCT573T Wfp CYPRESS 8-Bit Latches Features • E S D > 2000V • Function, pinout and drive compatible with the fastest bipolar logic • Fully compatible with T T L input and output logic levels • FCT-C speed at 4.2 ns max. Com’l


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    cy54/74fct373tcy54/74fct573tt373tfct573t+5l20-pincy74fct573tpc20-lead300-milcy74fct573tqc PDF

    A138G2

    Abstract: t166h TTL catalog binary counters with D-flip flop 2-bit adder layout ON48 nand gate layout Q6600C T175 AN14
    Contextual Info: } /i i s 000966 PRELIMINAR rfm c . DEVICE SPECIFICATION A P P L IE D M IC R O C IR C U IT S C O R P O R A T IO N Q6000 SERIES CMOS GATE ARRAYS FEATURES^ TECHNOLOGY _ Q6000 series arrays feature 2 ^ i l i c o n gate CMOS w ith 4wo^ level" metalizatiop? offering h ig n p e rfo rm a n c e and up to 85%


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    q6000q1400cq6600ca138g2+8t166httl catalogbinary counters with d-flip flop2-bit adder layouton48nand gate layoutt175an14 PDF

    CD74FCT257

    Abstract: CD74FCT2573
    Contextual Info: H A R R IS ' Sem ,conductor T373T, CD74FCT533T, CD74FCT573T, CD74FCT2373T, CD74FCT2573T December 1996 F a s t C M O S O c ta l T r a n s p a r e n t L a tc h e s Ordering Information Features • Advanced 0.8 micron CMOS Technology • Pin Compatible with Bipolar FAST Series at a Higher


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    chn 621

    Abstract: CHN 841
    Contextual Info: :9 |N a FAST CMOS IDT54/74FCT841AT/BT/CT/DT BUS I NTERFACE LATCHES Iw Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • C o m m o n features: The FC T8xxT series is built using an advanced dual metal C M O S technology. The FC T8xxT bus interface latches are designed to elim i­


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    idt54/74fct841at/bt/ct/dtt841t10-bitt373t+3t54/74chn 621chn 841 PDF

    CD54FCT373ATF3A

    Abstract: CD54FCT373TF3A CDP1802
    Contextual Info: »Y 2 3 C D 54F C T 373T F 3A C D 54FC T373A TF3A H A R R IS Octal Transparent Latch, 3-S tate April 1991 Type F e a tu re s D e s c rip tio n • This Circuit is Processed in Accordance to M il-S td883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.


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    FCT573T

    Contextual Info: CY54/T373T CY54/74FCT573T 8-BIT LATCHES p v d d ü c c C Y P H hbb FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of


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    cy54/74fct373tcy54/74fct573tfct373tfct573t+5373t/573t373at/573at373ct/573ctmil-std-883001233r PDF

    Contextual Info: CY54/T373T CY54/74FCT573T CYPRESS 8-Bit Latches Features ESD > 2000V • Function, pinout and drive compatible with the fastest bipolar logic Fully compatible with TTL Input and output logic levels • FCT-C speed at 4.2 ns max. ConTI FCT-A speed at 5.2 ns max. (Com’l)


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    cy54/74fct373tcy54/74fct573t20-lead150-mil+1300-mil PDF

    Contextual Info: 2 3 1991 CD54FCT374TF3A CD54FCT374ATF3A £ 0 H A R R IS Octal D Type Flip Flops, 3-State Aprii 1991 Type Features Description • This Circuit is Processed in Accordance to Mil-Std883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The CD54FCT374TF3A/CD54FCT374ATF3A octal D type,


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    cd54fct374tf3acd54fct374atf3amil-std883cd54fct374tf3a/cd54fct374atf3a PDF

    Contextual Info: m Ha r r is T373TF3A CD54FCT373ATF3A Octal Transparent Latch, 3-S tate Aprii 1991 Type Features D escription • This Circuit is Processed in Accordance to Mil-Std883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The T373TF3A/373ATF3A, octal transparent


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    cd54fct373tf3acd54fct373atf3amil-std883cd54fct373tf3a/373atf3a PDF

    T245T

    Abstract: T823T
    Contextual Info: 1 dt Inteßrated DeviceTechnology Inc HIGH-SPEED CMOS LOGIC ADVANCE INFORMATION FCTXXXT/AT TTL OUTPUT ONLY SERIES FEATURES: • FCTXXXT series equivalent to FC T and F A S T 1" speeds and drive • FCTXXXAT series equivalent to FCTA speeds and drive • C M O S devices with TR U E TTL input and output compatibility


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    t245tt823t PDF

    Contextual Info: CY54/T373T CY54/74FCT573T 8-Brr LATCHES ^ B Î f CYPRESS FEATURES • Function, Pinout and Drive Compatible with the Fastest Bipolar Logic ■ FCT-C speed at 4.2ns max. Com'l FCT-A speed at 5.2ns max. (Com'l) ■ Reduced VOH (typically = 3.0V) versions of


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    cy54/74fct373tcy54/74fct573tfct373tfct573t+4373t/573t373at/573at373ct/573ctmil-std-883 PDF

    Contextual Info: Integrated D evice Technology, Inc. FAST CMOS OCTAL TRANSPARENT LATCHES FEATURES: - • Com m on features: - Low input and output leakage <1 jxA max. - CM O S power levels - True TTL input and output compatibility - V oh = 3.3V (typ.) - V ol = 0.3V (typ.)


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    Contextual Info: SYSTEMS SLA8000 Series June 1988 VERY HIGH SPEED CHANNELLESS CMOS GATE ARRAYS D escription The SLA8000 Series consists of a group of seven very high-speed, sea-of-gates CMOS gate arrays. The series is fabricated utilizing our state-of-the-art 1.2 micron sili­


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    sla8000sla827s PDF

    FCT573T

    Abstract: CY74FCT373TPC 11Jop
    Contextual Info: ^ -<- C Y 54/74F C T 373T ÏË H ^ C Y P R F .S R C Y 54/74F C T 573T 8-Bit Latches Features • ESD > 20 >0V • Fu n ction , p in ou t an d d rive com p atib le with th e fa stest b ip olar logic • Fully co m p a tib le w ith T T L in p u t and ou tpu t logic levels


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