T152 ACT Search Results

c151 nec

Abstract: transistor c815 optocoupler c814 TR-303 nec c815 pdf transistor c815 NEC C812 TR303 c815 nec c811
Contextual Info: MLX32001 Universal PSTN Line Interface 1. Features and Benefits § § § § § § § CLIP / Caller-ID support Line status measuring facilities Line event registration Lightning safe Pre-programming of default settings Powered by PSTN line less than 10 µA power consumption during offline

optocoupler c814

Abstract: NEC c151 nec c815 TR-303 IC802 NEC C812 c814 optocoupler nec c811 pdf transistor c815 TR303
Contextual Info: MLX32001 Universal PSTN Line Interface 1. Features and Benefits § § § § § § § CLIP / Caller-ID support Line status measuring facilities Line event registration Lightning safe Pre-programming of default settings Powered by PSTN line less than 10 µA power consumption during offline

82493

Contextual Info: in t e i CHAPTER 23 Electrical Specifications 23.1. POWER AND GROUND T he 82498 C ache C ontroller has 65 V c c 3.3V pow er , 3 V cc 5 (5V pow er), and 78 V ss (ground) inputs; the 82493 C ache SRA M has 8 V c c (3.3V pow er), 1 V cc 5 input and 9 V ss (ground) inputs. Pow er and ground connections m ust be m ade to all external V cc and V ss

82c495

Abstract: 82C602 opti 82c495 82C802 82C495SLC 82C802G 82c602a opti 82C802 82C601 opti 82c602 motherboard
Contextual Info: OPTi 82C601/82C602 Buffer Devices Data Book Revision 1.0 912-3000-025 November, 1994 Copyright Copyright 1994, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of OPTi Incorporated, 2525 Walsh

ZD6A

Abstract: t177 ZR7a cache controller intel 82496
Contextual Info: in te i CHAPTER 7 ELECTRICAL SPECIFICATIONS 7.1. POWER AND GROUND For clean on-chip power distribution, the Pentium processor has 50 Vc c power and 49 Vss (ground) inputs. The 82496 Cache Controller has 56 V cc (power) and 67 V ss (ground) inputs and the 8 2 4 9 1 Cache SRAM has 9 V q c (power) and 9 VSs (ground) inputs. Power and

800MR

Abstract: 120v AC to 12V dc transformer 800MR-N37 800M-XAK 800C-P02Z 800A-G2BW VDE 0660 iec 337 pt j50bb 800M-XA 800M-NT2
Contextual Info: SELECTION GUIDE PUSH BUTTONS BULLETIN 800A, 800C, 800M Bul. 800MR Bul. 800A Bul. 800C Bul. 800MS Bul. 800MB Bulletin 800MR 22.5 mm Push Buttons Product Overview Bulletin 800MR/22.5 mm Push Buttons Table of Contents y 22.5 mm Mounting Hole y Type 13 Oiltight

SLC88B17

Contextual Info: SLC88B17 ADVANCE INFORMATION PCI-ISA Bridge Chip FEATURES 5 Volt Operation PCI 2.1 Compliant PCI to ISA bridge - Supports 33MHz PCI bus Supports Full ISA at ¼ of PCI Frequency Supports Full Subtractive Decode of PCI Supports up to 5 ISA Slots Supports PC/PCI DMA Protocol

Contextual Info: Electrical Characteristics intei, 14 Electrical Characteristics 14.1 Absolute Maximum Ratings Case Temperature under B ! to +100^C Storage Temperature.

HVQFN24

Abstract: IESS-308 MO-220 T152 SOT616
Contextual Info: TFF11152HN Low phase noise LO generator for VSAT applications Rev. 2 — 4 April 2011 Product data sheet 1. General description The TFF11152HN is a Ku band frequency generator intended for low phase noise Local Oscillator LO circuits for Ku band VSAT transmitters and transceivers. The specified

metal detector diagram PI

Abstract: ku band signal generator metal detector plans HVQFN24 IESS-308 MO-220 T152
Contextual Info: TFF11152HN Low phase noise LO generator for VSAT applications Rev. 1 — 12 July 2010 Objective data sheet 1. General description The TFF11152HN is a Ku band frequency generator intended for low phase noise Local Oscillator LO circuits for Ku band VSAT transmitters and transceivers. The specified

MC68070

Contextual Info: 7 Electrical and Physical Specifications This chapter describes the CL450’s electrical and mechanical character­ istics. The chapter is divided into three sections: • 7.1, Operating Conditions ■ 7.2, AC Timing Characteristics ■ 7.3, Package Specifications

5962-08228

Contextual Info: Standard Products UT699 32-bit Fault-Tolerant SPARCTM V8/LEON 3FT Processor Preliminary Data Sheet January 7, 2009 INTRODUCTION The UT699 is a pipelined monolithic, high-performance, faulttolerant SPARCTM V8/LEON 3FT Processor. The UT699 provides a 32-bit master/target PCI interface, including a 16 bit

54009

Abstract: bt34w
Contextual Info: Data Sheet January 2002 DSP1627 Digital Signal Processor 1 Features • Optimized for mobile communications applications with a bit manipulation unit for higher coding efficiency. ■ On-chip, programmable, PLL clock synthesizer. ■ 14 ns and 11 ns instruction cycle times at 5 V, 10 ns instruction cycle time at 3.0 V, and 20 ns and 12.5 ns instruction cycle times at 2.7 V.

M8260

Abstract: Marking W36 AG34 Frequency detector 31n w6 marking w35 W39 marking AP36
Contextual Info: Hardware Design Guide July 2002 TFEC0410G 2.5/10 Gbits/s Optical Networking Interface with Strong/Weak FEC and Digital Wrapper 1 Document Organization This document is primarily intended for designers and engineers whom require I/O characteristics for board

Halotronic HT 1-10 DIM

Abstract: halotronic htm 150 wiring diagram halotronic ht 150 osram halotronic htm 150 halotronic ht 105 osram HT-60 osram halotronic osram halotronic ht 70 osram halotronic 70 halotronic
Contextual Info: HALOTRONIC Technical Guide Electronic transformers for low-voltage halogen lamps • Units for lighting systems • Units for installation in luminaires THERE IS LIGHT. AND THERE IS OSRAM. March ’00 Contents 1. Design and mode of operation 4 2. Range and technical data

T3D 67 diode

Abstract: T2D 79 diode T3D 34 diode t17c diode T75A T27b T2D 78 T2D 86 t3d 69 T3D 45 diode
Contextual Info: 82371AB PCI ISA IDE Xcelerator PIIX4 22.0 PIIX4 Electrical Characteristics 22.1 Absolute Maximum Ratings Table 79. Absolute Maximum Ratings Parameter Warning: Maximum Rating Case temperature under bias 0° C to +85° C Storage temperature -55° C to +150° C

LUCENT DSP1610

Abstract: 4017 data sheet ic 4017 ic 4017 ic cd 4017 T76B DATA SHEET IC 4011 data sheet ic 4017 intel 4040 pin diagram of ic 4520 DB10 DSP1617
Contextual Info: Data Sheet March 2000 DSP1627 Digital Signal Processor 1 Features • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency. ■ On-chip, programmable, PLL clock synthesizer. ■ 14 ns and 11 ns instruction cycle times at 5 V, 10 ns instruction cycle time at 3.0 V, and 20 ns and 12.5 ns instruction cycle times at 2.7 V, respectively.

DSP1620

Abstract: NE as7 1412D DSP1627 DSP1628 DSP1629 DS97-321WDSP T84V
Contextual Info: Advisory May 1999 Clarification to the Serial I/O Control Register Description for the DSP1620/27/28/29 Devices Active Clock Frequency The purpose of this advisory is to clarify the function of the serial I/O control registers in the DSP1620/27/28/29 devices. Specifically, it clarifies the function of the control register field that specifies the active clock frequency.

ZD6A

Abstract: TAG03 82497 3 PP 03 L 04 14-3-221 cfa24 cache controller intel 82496 zd-5a
Contextual Info: in te i CHAPTER 14 ELECTRICAL SPECIFICATIONS 14.1. ABSOLUTE MAXIMUM RATINGS Table 14-1 provides environmental stress ratings for the chip set com ponents. Functional operation at the absolute maximum and minimum is not implied or guaranteed. Extended exposure to maximum ratings may affect device reliability. Further, precautions should be

T3D 34 diode

Abstract: 82440LX Diode T3D 57 t57b T27b t59b T31C Transistor t59c ISA BUS spec t119
Contextual Info: E DATASHEET ADDENDUM 82371AB PIIX4 PCI ISA IDE Xcelerator Timing Specifications September 1997 Order Number: 290548-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions

AD5025

Abstract: AD5061 AD5666
Contextual Info: Fully Accurate, 12-/14-/16-Bit, Dual, VOUT nanoDAC SPI Interface, 4.5 V to 5.5 V in a TSSOP AD5025/AD5045/AD5065 ence buffer is provided on chip. The AD5025/AD5045/AD5065 incorporate a power-on reset circuit that ensures the DAC output powers up zero scale or midscale and remains there until a valid

T55B

Abstract: T3D 77 t61b T68B 82371AB 82430TX 82440LX 82C37 82C54 82C59
Contextual Info: DATASHEET ADDENDUM Intel 82371AB PCI ISA IDE Xcelerator PIIX4 Timing Specification 273135-001 October, 1997 82371AB PCI ISA IDE Xcelerator (PIIX4) Features • Supported Kits for both Pentium and ■ ■ ■ ■ Pentium® Pro Microprocessors — 82430TX ISA Kit

Contextual Info: Fully Accurate, 12-/14-/16-Bit, Dual, VOUT nanoDAC SPI Interface, 4.5 V to 5.5 V in a TSSOP AD5025/AD5045/AD5065 FEATURES ence buffer is provided on chip. The AD5025/AD5045/AD5065 incorporate a power-on reset circuit that ensures the DAC output powers up zero scale or midscale and remains there until a valid

intel 8212 data sheet

Abstract: data sheet ic 4017 LUCENT DSP1610 BLOCK DIAGRAM DESCRIPTION of IC 4017 WITH 16 PINS TMS 3529 DATA SHEET IC 4011 pin diagram of ic 4040 C9007 data sheet ic 7495 data sheet of ic 4018
Contextual Info: Advance Data Sheet December 2000 T8301 Internet Protocol Telephone Phone-On-A-Chip IP Solution DSP 1 Introduction Lucent Technologies’ Phone-On-A-Chip IP Solution is a highly integrated set of IC chips that form the basic building blocks for an internet protocol telephone IPT , residing on a local area network (LAN).