T00MM Search Results

tdq4-M

Abstract: HP 2231 IS42S16128
Contextual Info: 28 i 256K x 16 4-MBIT SYNCHRONOUS DYNAMIC RAM ADVANCE INFORMATION JUNE 1997 FEATURES DESCRIPTION • Clock frequency: 100 MHz • Two Bank internal structure: ISSI's 4Mb Synchronous DRAM IS42S16128 is organized as a 131072-word x 16-bit x 2-bank for improved performance.

Contextual Info: ISST 262,144 x 8 SmartVoltage BOOT BLOCK FLASH MEMORY • SmartVoltage Technology — 5V or 12V Program/Erase — 2.7V, 3.3V or 5V Read Operation ADVANCE INFORMATION NOVEMBER 1996 . A u to m a te d B y te W rite and B lo c k E rase — Industry-Standard Command User

Contextual Info: IS24C04 ISSI •1 4,096-BIT SERIAL ELECTRICALLY ERASABLE PROM PRELIMINARY SEPTEMBER 1995 FEATURES • Low p o w e r C M O S — A ctive cu rre n t less than 2 m A — Standby current less than 8 |iA • • • • • • • H a rdw a re w rite protection

Contextual Info: I S CMOS SINGLE CHIP 8-BIT MICROCONTROLLER S F ADVANCE INFORMATION AR PIL 1997 FEATURES G ENERAL DESCRIPTION • 8K x 8 ROM IS80C52 only The ISSI IS80C52/32 is a high-performance micro­ controller fabricated using high-density CMOS technology. The CMOS IS80C52/32 is functionally

IS93C66-3GR

Abstract: IS93C66-3 1S93C66-3 W044
Contextual Info: ISSI IS93C66-3 4,096-BIT SERIAL ELECTRICALLY ERASABLE PROM AUGUST 1995 FEATURES OVERVIEW • State-of-the-art architecture — Non-volatile data storage — Low voltage operation: 3.0V Vcc = 2.7V to 6.0V — Full TTL compatible inputs and outputs — Auto increment for efficient data dump