SY10H602JCTR Search Results

SY10H602JCTR Datasheets (4)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
SY10H602JCTR		Micrel Semiconductor	9 Bit Latched TTL-to-ECL	Original	PDF	66.37KB	4
SY10H602JCTR		Micrel Semiconductor	9-BIT LATCHED	Original	PDF	72.01KB	4
SY10H602JC-TR		Microchip Technology	Integrated Circuits (ICs) - Logic - Translators, Level Shifters - IC TRNSLTR UNIDIRECTIONAL 28PLCC	Original	PDF	92.5KB
SY10H602JCTR		Synergy Semiconductor	9-BIT LATCHED TTL-TO-ECL	Scan	PDF	63.61KB	2

SY10H602JCTR Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: 9-BIT L A T C H E D SYNERGY . TTL-TO-ECL - v . MHt . . S E M IC O N D U C T O R FEATURES • 9-bit ideal for byte-parity applications ■ Fully compatible with Motorola MC10H/100H602 The SY10/100H602 are 9-bit, dual supply TTL-to-ECL translators with latches. Devices in the Synergy 9-bit	OCR Scan	10Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead SY10H602JC SY10H602JCTR SY100H602JC SY100H602JCTR J28-1	PDF
100H602 Abstract: SY100H602 SY10H602 SY10H602JC SY10H602JCTR Contextual Info: 9-BIT LATCHED TTL-TO-ECL SY10H602 SY100H602 DESCRIPTION FEATURES • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading	Original	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead SY10H602JCTR J28-1 100H602 SY100H602 SY10H602 SY10H602JC SY10H602JCTR	PDF
123 DAL Abstract: synergy series SY100H602 SY10H602 SY10H602JC q213 Contextual Info: * 9-BIT LATCHED TTL-TO-ECL SYNERGY S E M IC O N D U C T O R FEATURES DESCRIPTION I 9-bit ideal for byte-parity applications T he SY 10/100H 602 are 9-bit, dual supply TTL-to-E C L tran sla to rs w ith latches. D evices in the S ynergy 9-bit tra n sla to r series utilize the 28-lead PLCC fo r optim al	OCR Scan	SY10H602 SY100H602 10Hxxx) MC10H/100H602 SY10/100H602 28-lead SY10H602JC J28-1 SY10H602JCTR 123 DAL synergy series SY100H602 q213	PDF
Contextual Info: * 9-BIT LATCHED TTL-TO-ECL SYNERGY SY10H602 SY100H602 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply	OCR Scan	SY10H602 SY100H602 10Hxxx) MC10H/100H602 10/100H 28-lead SY10H602JC SY10H602JCTR SY100H602JC 100H602JCTR	PDF
Contextual Info: * SYNERGY 9-BIT LATCHED TTL-TO-ECL SY10H602 SY100H602 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q	OCR Scan	SY10H602 SY100H602 10Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead	PDF
Contextual Info: * SYNERG Y 9-B IT LATCHED TTL-TO -EC L SY10H602 SY100H602 SEMICONDUCTOR FEATURES DESCRIPTION 9-bit ideal for byte-parity applications Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply 3.5ns max. D to Q PNP TTL inputs for low loading	OCR Scan	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead	PDF
Contextual Info: SY10H602 SY100H602 FINAL 9-BIT LATCHED TTL-TO-ECL DESCRIPTION FEATURES • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading	Original	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead SY10H602JCTR J28-1	PDF
SY100H602 Abstract: SY10H602 SY10H602JC SY10H602JCTR Contextual Info: SYNERGY SY10H602 SY100H602 9-BIT LATCHED TTL-TO-ECL SEMICONDUCTOR SYNERGY SY10H602 SY100H602 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize	Original	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 SY10/100H602 28-lead SY10H602JC SY100H602 SY10H602 SY10H602JC SY10H602JCTR	PDF
Contextual Info: * SYNERGY 9-BIT LATCHED TTL-TO-ECL SY10H602 SY100H602 SEMICONDUCTOR FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q	OCR Scan	SY10H602 SY100H602 10Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead	PDF
Contextual Info: * 9 -B IT L A T C H E D SYNERGY T T L -T O -E C L SY10H602 SY100H602 SEMICONDUCTOR FEATURES DESCRIPTION 9-bit ideal for byte-parity applications Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply 3.5ns max. D to Q	OCR Scan	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 SY10/100H602 28-lead SY10H602JC J28-1 SY10H602JCTR	PDF
SY100H602 Abstract: SY10H602 Contextual Info: • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise ■ Dual supply ■ 3.5ns max. D to Q ■ PNP TTL inputs for low loading ■ Choice of ECL compatibility: MECL 10KH 10Hxxx	Original	SY10H602 SY100H602 10Hxxx) 100Hxxx) MC10H/100H602 28-pin SY10/100H602 28-lead SY100H602 SY10H602	PDF