SY101E451 Search Results

Contextual Info: & 6-BIT REGISTER DIFF. DATA & CLOCK SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • 1100 MHz Min. Toggle Frequency. The SY10E/100E/101E451 offers six D-type flip-flops with single-ended outputs and differential data and clock inputs and is designed for use in new, high performance ECL system. The

SY100E451

Abstract: SY101E451 SY10E451
Contextual Info: 6-BIT REGISTER DIFF. DATA & CLOCK SYNERG Y SEMICONDUCTOR 1100 MHz Min. Toggle Frequency. Differential Inputs: Data and Clock. VBB Output. Asynchronous Master Reset ESD protection of 2000V. Fully compatible with industry standard 10KH and 100K ECL levels. Extended supply voltage option for 100K I/O.