SV52 Search Results

Contextual Info: 5 Transceiver Loopback Support in Stratix V Devices 2013.05.06 SV52007 Feedback Subscribe The Stratix V loopback options allow you to verify how different functional blocks work in the transceiver. Related Information Stratix V Device Handbook: Known Issues

Contextual Info: Dynamic Reconfiguration in Stratix V Devices 6 2013.05.06 SV52008 Subscribe Feedback The transceiver reconfiguration controller offers several different dynamic reconfiguration modes. You can choose the appropriate reconfiguration mode that best suits your application needs. All the dynamic

interlaken

Abstract: active noise cancellation for FPGA CRC-32 8b/10b scrambler remote control transmitter and receiver circuit KF35 KF40
Contextual Info: 1. Transceiver Architecture in Stratix V Devices SV52002-1.1 This chapter provides details about the Stratix V GX and GS transceiver architecture, transceiver channels, and a description of the transmitter and receiver channel datapaths. Stratix V GX and GS devices provide up to 66 back-plane capable

loopback

Abstract: pcie loop back PCIe 8B10B
Contextual Info: 6. Loopback in Stratix V Devices SV52007-1.0 This chapter describes the two loopback options used on Stratix V GX and GS devices, which allow you to verify how different functional blocks work in the transceiver standard physical coding sublayer PCS . Standard PCS Loopback Configurations

Contextual Info: 1 Transceiver Architecture in Stratix V Devices 2013.05.06 SV52002 Subscribe Feedback For a complete understanding of Stratix V transceivers, first review the transceiver architecture chapter, then refer to the subsequent chapters in this volume. You can implement Stratix V transceivers using Altera's transceiver intellectual property IP which are part

custom transmitter diode

Abstract: 64b/66b encoder 8b/10b scrambler gearbox CRC32
Contextual Info: 5. Custom Transceiver Configuration Datapath in Stratix V Devices SV52006-1.0 This chapter describes the custom transceiver configuration datapath in Stratix V devices for the 10G and standard physical coding sublayer PCS blocks. Table 5–1 lists the Altera® Transceiver PHY IP used, depending on the desired

Contextual Info: Transceiver Reset Control in Stratix V Devices 3 2013.05.06 SV52004 Subscribe Feedback Altera’s recommended reset sequence ensures that both the physical coding sublayer PCS and physical medium attachment (PMA) in each transceiver channel are initialized and functioning correctly.

interlaken

Abstract: CRC32
Contextual Info: 2. Transceiver Clocking in Stratix V Devices SV52003-1.0 This chapter provides detailed information about the Stratix V transceiver clocking architecture. The clocking architecture chapter is divided into three sections: • “Input Reference Clocking”—Describes how the reference clock to the transmit

interlaken

Abstract: gearbox rev pcie Design guide parallel scrambler PCI remote control transmitter and receiver circuit interlaken protocol gearbox 10GBASE-R pcie Gen2 payload 10GBASE-LR
Contextual Info: 4. Transceiver Protocol Configurations in Stratix V Devices SV52005-1.0 This chapter provides the transceiver channel datapath, clocking guidelines, channel placement guidelines, and a brief description of protocol features supported in each transceiver configuration for Stratix V devices.

BSV52

Abstract: BSV52R HIGH SPEED SWITCHING NPN SOT23 DS201
Contextual Info: SOT23 NPN SILICON PLANAR HIGH SPEED SWITCHING TRANSISTOR SV52 P AR TM AR KIN G DETAILS: B SV52 - B2 B SV 52R - B4 ABSOLUTE M A X IM U M RATINGS PARAMETER VALUE UNIT V CBO 20 V V CES 20 V 12 V SYM BO L C ollector-B ase V oltag e C olle cto r-E m itte r V oltag e

Contextual Info: Transceiver Clocking in Stratix V Devices 2 2013.05.06 SV52003 Feedback Subscribe This chapter provides information about the Stratix V transceiver clocking architecture. The chapter describes the clocks that are required for operation, internal clocking architecture, and clocking options

Contextual Info: 4 Transceiver Configurations in Stratix V Devices 2013.05.06 SV52005 Subscribe Feedback Stratix V devices have a dedicated transceiver physical coding sublayer PCS and physical medium attachment (PMA) circuitry. To implement a protocol, use a PHY IP listed in Table 4-1.

Stratix V

Contextual Info: 7. Dynamic Reconfiguration in Stratix V Devices SV52008-1.0 This chapter describes the dynamic reconfiguration features available in Stratix V transceivers. f For information about features that will be supported in a future release of the Quartus® II software, refer to the Upcoming Stratix V Device Features document.

Stratix V

Abstract: M PHY Transmitter
Contextual Info: 3. Transceiver Reset Control in Stratix V Devices SV52004-1.0 This chapter provides the recommended transceiver initialization and reset sequence for Stratix V devices. The recommended reset sequence ensures that the physical coding sublayer PCS and physical medium attachment (PMA) blocks in the

tcd103d

Abstract: TC74HC04P TA8660P ta8660 TCD107D TCD142D tcd142 toshiba tcd ccd toshiba ccd linear dual shift gate DS75365
Contextual Info: 7. Peripheral Circuits 7-1 Timing Generator Circuit T he C C D im age sensor operation needs various pulses that are in synchronous relations, and these pulses are cyclic. The follows are exam ple circuitry for C CD im age sensor. Fig. 7-1 show s an exam ple o f tim ing pulse generator circuit for driving m ainly the

cn/A/U 237 BG

Contextual Info: AVX Periodic Tables Version 10.1 The Latest CV Tables from the Leader in Capacitor Technology Table of Contents COMMERCIAL PRODUCTS Product Line Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 CERAMIC CAPACITORS

Contextual Info: Leaded High Voltage MLCC SV Series Radial Capacitors – X7R Dielectric Advanced Ceramic Capacitors High value, low leakage and small size are difficult parameters to obtain in capacitors for high voltage systems. AVX special high voltage MLC radial leaded

hms2812

Abstract: AD9433BSVZ-105 MC10EL16 AD9432 AD9433 AD9433BSVZ-1251 ad9433bsvz
Contextual Info: 12-Bit, 105 MSPS/125 MSPS, IF Sampling ADC AD9433 IF sampling up to 350 MHz SNR: 67.5 dB, fIN up to Nyquist at 105 MSPS SFDR: 83 dBc, fIN = 70 MHz at 105 MSPS SFDR: 72 dBc, fIN = 150 MHz at 105 MSPS 2 V p-p analog input range On-chip clock duty cycle stabilization

pcie gen 2 payload

Abstract: asi paralell
Contextual Info: Stratix V Device Handbook Volume 3: Transceivers 101 Innovation Drive San Jose, CA 95134 www.altera.com SV5V2-1.4 11.1 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos

22 k C0G 100

Abstract: SV-04
Contextual Info: High Voltage MLC Radials SV Style Application Information on High Voltage MLC Capacitors High value, low leakage and small size are difficult parameters to obtain in capacitors for high voltage systems. AVX special high voltage MLC radial leaded capacitors meet these

interlaken

Abstract: CRC-32 LFSR NF45
Contextual Info: Stratix V Device Handbook Volume 3: Transceivers Stratix V Device Handbook Volume 3: Transceivers 101 Innovation Drive San Jose, CA 95134 www.altera.com SV5V2-1.3 11.0 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

KF35-F1152

Abstract: 5SGX receiver altLVDS vhdl code scrambler epcq "switch power supply" handbook CD 76 13 CP
Contextual Info: Stratix V Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com SV5V1-1.7 12.0 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos

SV-03

Abstract: pF8200
Contextual Info: High Voltage MLC Radials SV Style Application Information on High Voltage MLC Capacitors High value, low leakage and small size are difficult parameters to obtain in capacitors for high voltage systems. AVX special high voltage MLC radial leaded capacitors meet these

Contextual Info: High Voltage MLC Radials SV Style Application Information on High Voltage MLC Capacitors High value, low leakage and small size are difficult parameters to obtain in capacitors for high voltage systems. AVX special high voltage MLC radial leaded capacitors meet these