SV00022 Search Results
SV00022 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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74LVT
Abstract: 74LVT00 74LVT00D 74LVT00PW
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OCR Scan |
74lvt0014-pin74lvt00dot108-1+3 | |
la 1837
Abstract: 10MHZ 74LVT 74LVT08 74LVT08PW
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OCR Scan |
74lvt0814-pinot108-1ot337-1+4 | |
DNA SMD MARKING CODE
Abstract: DNA MARKING CODE AN246 Transmission Lines and Terminations with Philips Advanced Logic Families philips Semiconductor Integrated Circuit Data Catalog Philips Logic Marking Code smd diode y3
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74lvt0814-pindna smd marking codedna marking code+5 | |
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Contextual Info: Philips Semiconductors Preliminary specification 3.3V Quad 2-input NOR gate 74LVT02 QUICK REFERENCE DATA SYMBOL LOGIC DIAGRAM CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay An or Bn to Yn CL = 50pF; VCC = 3.3V CIN Input capacitance |
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74lvt02sa00362sa0033774lvt+3 | |
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Contextual Info: Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL LOGIC SYMBOL IEEE/IEC CONDITIONS Tamb = 25CC; GND = 0V PARAMETER TYPICAL UNIT 3.8 3.3 ns Propagation delay An, Bn, Cn to Yn CL = 50pF; Vo c = 3.3V |
OCR Scan |
74lvt10sa0034674lvt10mhz+2 | |
AN 17183Contextual Info: Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = OV PARAMETER Propagation delay TYPICAL UNIT to Yn CL = 50pF; Vcc - 3.3V C|N Input capacitance Vj = 0V or 3-OV 3 pF tcL |
OCR Scan |
74lvt0014-pin74lvt00pwan 17183 | |
74LVT74
Abstract: 74LVT74PW
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74lvt7474lvt74pw | |
74LVT
Abstract: 74LVT02 74LVT02PW
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74lvt0214-pinot108-1semiconductors74lvt+1 | |
74LVT
Abstract: 74LVT20 74LVT20PW
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74lvt20sa0035274lvt74lvt20pw | |
TTL Schmitt-Trigger Inverters
Abstract: INVERTER SCHMITT TRIGGER 74lvt INVERTER SCHMITT TRIGGER VCC 30 TTL Schmitt-Trigger inverter 74LVT14 SO14 package
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74lvt14ttl schmitt-trigger invertersinverter schmitt trigger74lvt+3 | |
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Contextual Info: Philips Semiconductors Product specification 3.3V Triple 3-input NAND gate 74LVT10 QUICK REFERENCE DATA SYMBOL LOGIC SYMBOL IEEE/IEC CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 1 & 12 2 tPLH tPHL Propagation delay An, Bn, Cn to Yn CL = 50pF; |
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74lvt10sv00059sa0034674lvt+3 | |
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Contextual Info: Philips Semiconductors Preliminary specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL PARAMETER LOGIC SYMBOL CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT 2.4 2.8 ns tPLH tPHL Propagation delay An or Bn to Yn CL = 50pF; VCC = 3.3V |
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74lvt00sa0033474lvt10mhz+2 | |
DNA SMD MARKING CODEContextual Info: INTEGRATED CIRCUITS 74LVT20 3.3V Dual 4-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 28 Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA SYMBOL LOGIC DIAGRAM CONDITIONS |
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74lvt20sa0035201-jan-98dna smd marking code | |
SF00045Contextual Info: INTEGRATED CIRCUITS 74LVT74 3.3V Dual D-type flip-flop Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 28 Philips Semiconductors Product specification 3.3V Dual D-type flip-flop 74LVT74 QUICK REFERENCE DATA SYMBOL DESCRIPTION CONDITIONS |
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74lvt7401-jan-98sf00045 | |
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74LVT
Abstract: 74LVT10 74LVT10PW
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74lvt10sv0005974lvt74lvt10pw | |
74LVT32
Abstract: 74LVT32D 74LVT32DB 74LVT32PW 74LVT32PWDH
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74lvt32sa0035574lvt32d74lvt32db+2 | |
74LVT00
Abstract: 74LVT 74LVT00PW
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74lvt0014-pinot108semiconductors74lvt+1 | |
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Contextual Info: Philips Semiconductors Product specification 3.3V Dual 4-input NAND gate 74LVT20 QUICK REFERENCE DATA LOGIC DIAGRAM CONDITIONS T,mb = 25“C; G N D =0V SYMBOL PARAMETER 'P L H Propagation delay An, Bn, Cn, Dn to Yn CL = 50pF; Vcc = 3.3V C IN Input Capacitance |
OCR Scan |
74lvt20sa0035074lvt510mhz+2 | |
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Contextual Info: Philips Semiconductors P roduct specification 3.3V Quad 2-input NOR gate 74LVT02 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb s 25~C; GND = OV PARAMETER Propagation delay tpLH tpHL TYPICAL 2.8 2.6 CL = 50pF; VCC = 3.3V to Yn UNIT CiN Input capacitance V| = OV or 3.0V |
OCR Scan |
74lvt0214-pin74lvt02d74lvt02pw | |
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Contextual Info: INTEGRATED CIRCUITS 74LVT00 3.3V Quad 2-input NAND gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 15 Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; |
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74lvt0074lvt00pwdh14-pin | |
74LVT
Abstract: 74LVT32 74LVT32PW
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74lvt32sa0035574lvt74lvt32pw | |
LVT32
Abstract: 74LVT 74LVT32 74LVT32PW
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OCR Scan |
74lvt32sa00356sqt402-1mo-153+5 | |
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Contextual Info: Product specification Philips Semiconductors 3.3V Quad 2-input AND gate 74LVT08 QUICK REFERENCE DATA TEST CONDITIONS Tamb = 25°C; GND = 0V PARAMETER SYMBOL UNTT TYPICAL 3.0 3.4 tpHL Propagation delay An or Bn to Yn CL = 50pF; VCC=3.3V C|N Input capacitance |
OCR Scan |
74lvt0814-pinot108-1ot337-1 | |
74LVT
Abstract: 74LVT10 74LVT10PW
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OCR Scan |
74lvt10sa0034674lvt10mhz+4 | |