STROBE IC 555 Search Results

Contextual Info: Data Sheet RD5CYD08 R04DS0041EJ0800 Rev.8.00 Jan 10, 2014 IGBT Driver Description The RD5CYD08 has two–input AND gate in a 5 pin package. This product is suited as IGBT Driver IC for the strobe. Features • • • • Supplied on emboss taping for high-speed automatic mounting.

Contextual Info: Data Sheet RD3CYD08 R04DS0040EJ0700 Rev.7.00 Jan 10, 2014 IGBT Driver Description The RD3CYD08 has two–input AND gate in a 5 pin package. This product is suited as IGBT Driver IC for the strobe. Features • • • • Supplied on emboss taping for high-speed automatic mounting.

Contextual Info: Data Sheet RD5CYDT08 R04DS0042EJ0800 Rev.8.00 Jan 10, 2014 IGBT Driver / CMOS Logic Level Shifter Description The RD5CYDT08 has two–input AND gate in a 5 pin package. This product is suited as IGBT Driver IC for the strobe. Features • • • • • Supplied on emboss taping for high-speed automatic mounting.

SI7643

Abstract: si7543
Contextual Info: ¡en S IL IC O N IX IN C 03 D eT | 8 2 S 4 7 3 S 4735 S IL ICONIX INC 0015547 a ¥~ _ 03E 12547 D SÌ7543 CMOS 12-Bit Serial Input DAC y y Jl M Silïconix . incorporated 'z f - ô FEATURES BENEFITS APPLICATIONS • Serial Load On Positive Or Negative Strobe

LS7031

Abstract: decade counter circuit diagram HIGH FREQUENCY DECADE COUNTER LS7031-1 Two Digit bcd counter diagram 3 Digit counter diagram LS7040 bcd to seven segment circuit diagram frequency counter Circuit 6 digit counter
Contextual Info: LSI/CSI 555" LS7031 M anufacturers o j C u stom a n d S ta n d a rd L S I Circuits 1235 Walt Whitman Road. Melville. NY 11747-3086 • Tel.: 516 271-0400 • Fax: (516) 271-0405 Revised O ctober 7990 6 DECADE MOS UP COUNTER W ITH 8 DECADE LATCH AND MULTIPLEXER

dc motor tape recorder

Contextual Info: O rdering num ber: EN 1402C Monolithic Linear 1C N o . 1 402C L A 5 5 5 0 , 5 5 5 0 M samyo i Low-Voltage i DC Motor Speed Controller w i t h Lo g i c C i r c u i t Applications The LA5550, 5550M are low-voltage 3V min. DC motor speed control IC with bidirectional driver and logic circuit. Speed control, function control of DC

5550M

Abstract: LA5550 1402C LA5550M MFP20 bidirectional dc motor speed controller 3v dc motor
Contextual Info: O rdering num ber: EN 1402C Monolithic Linear 1C N o . 1402C L A sa m y o i L o w -V o lta g e DC 5 5 5 0 , 5 5 5 0 M M otor Speed i C o n tro lle r Lo gic w ith Circu it Applications The LA5550, 5550M are low-voltage 3V min. DC motor speed control IC with

sanyo lm

Abstract: dc shunt motor sanyo CG 5550M LA5550 LA5550M MFP20 LA5524 3V DC Motor
Contextual Info: Ordering number:ENN1402D Monolithic Linear 1C _ LA555Q, 5550M ISAftYOl Low-Voltage DC Motor Speed Controller with Logic Circiuit Applications Package Dimensions The L A 5 5 5 0 , 5550M are low-voltage 3V min. DC m otor speed control IC with bidirectional driver and

5550M

Abstract: LA5550M LA5550 MFP20 dc motor tape recorder
Contextual Info: Ordering number:EN1402C Monolithic Linear IC LA5550, 5550M Low-Voltage DC Motor Speed Controller with Logic Circiuit Applications Package Dimensions The LA5550, 5550M are low-voltage 3V min. DC motor speed control IC with bidirectional driver and logic circuit. Speed control, function control of DC

la5550m

Contextual Info: Ordering number:ENN1402D Monolithic Linear IC LA5550, 5550M Low-Voltage DC Motor Speed Controller with Logic Circiuit Applications Package Dimensions The LA5550, 5550M are low-voltage 3V min. DC motor speed control IC with bidirectional driver and logic circuit. Speed control, function control of DC

ENN1402D

Abstract: 5550M LA5550 LA5550M MFP20 3v dc motor
Contextual Info: Ordering number:ENN1402D Monolithic Linear IC LA5550, 5550M Low-Voltage DC Motor Speed Controller with Logic Circiuit Applications Package Dimensions The LA5550, 5550M are low-voltage 3V min. DC motor speed control IC with bidirectional driver and logic circuit. Speed control, function control of DC

14069

Abstract: 14069 U ic 14069 32-bit shift register LS161 plasma display on 14069 LC1092CP LC1092DP LS138
Contextual Info: Advance AT&T DATA S H E E T L C 1 0 9 2 C P / D P AC P L A S M A D I S P L A Y ROW D R IV ER S D ES C R IP TIO N The LC1092CP and LC1092DP are high-voltage CMOS HV-CMOS integrated circuits that are assembled in 44-pin plastic J-leaded chip carriers. The LC1092DP pinout alignment is the mirror image of the LC1092CP pinout alignment (see Figures 2 and

S-2266

Contextual Info: r z 7 SCS-THOMSON Ä 7# HCC/HCF4514B HCC/HCF4515B 4-BIT LATCH/4-TO-16 LINE DECODER HCC/HCF4514B O UTPUT "HIGH" ON SELECT HCC/HCF4515B O UTPUT "LOW " ON SELECT • Q UIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE ■ STROBED INPUT LATCH ■ INHIBIT CONTROL

SSi F 3883 A

Abstract: 0.47 MF CAPACITOR 400 volt AA0499 SSi K 3883 A AA0373
Contextual Info: SECTION 2 SPECIFICATIONS GENERAL CHARACTERISTICS The DSP56603 is fabricated in h ig h-density CM OS w ith T ransistor-T ransistor Logic TTL -com patible in p u ts a n d outputs. Functional op eratin g conditions are given in T a b le 2-4 on p ag e 2-3. A bsolute

plasma display driver

Contextual Info: 0=11,1754 000310b T 'S Z A l- O ^ 4 • T II4 SN55S01E AC PLASMA DISPLAY DRIVER TEXAS • INSTR LIN/INTFC D2472, APRIL 1986-R EVISED DECEMBER 1989 J PACKAGE (TOP VIEW) 1 0 0-V Totem-Pola Outputs • Low Stand-by Pow er Consumption • All Outputs Contain Sink and Source Clam p

BB pwr 70

Abstract: attda400
Contextual Info: Preliminary Data Sheet May 1993 = AT&T Microelectronics ATTDA400 Programmable 125 MHz Clock Distribution IC Description Features • Generates a programmable output frequency from an input clock fin fout The ATTDA400 Clock Distribution IC is a single­ supply combination— programmable timing

3B-36

Contextual Info: M RON I I C r-i'-M'v MT56C2818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM S IN G LE 8 K x 1 8 SR A M , D U A L 4K x 18 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Autom atic W RITE cycle completion • Operates as two 4K x 18 SRAM s w ith common

LS161

Abstract: MC1406 LC1092AP LC1092BP L32N 32-bit shift register
Contextual Info: Advance at t = DATA SHEET LC1092AP/BP AC PLASMA DISPLAY COLUMN DRIVERS DESCRIPTIO N J-leaded hi9 ' 'la9= CM°S HV-CMOS Integrated circuits mat are assembled In 44-pln plastic 3 for details? LC1092BP pinout alignment is the mirror image of the LC1092AP pinout alignment (see Figures 2 and

tms 3614

Abstract: ICS1394
Contextual Info: Integrated Circuit Systems, Inc. ICS1394 Video Dot Clock Generator Features Applications • Low Cost - Eliminates need for multiple crystal clock oscillators in video display subsystems • Strobed /Transparent frequency select options • Mask-programmable frequencies

Contextual Info: M IC R O N * MT56C2818 8 K x 18, DUAL 4 K x 18 CACHE DATA SRAM CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES PIN ASSIGNMENT Top View • A u tom atic W RITE cycle com pletion • O p erates a s tw o 4K x 18 SR A M s w ith com m on

CBUG05

Abstract: ph 4746 cdp6551 cdpi873
Contextual Info: 706. CDP65516 , CMOS Microprocessors, Memories and Peripherals > r Product Preview CMOS(2048-Word x 8-Bit Static Read-Only Memory Features • 3 to 6 volt sup ply ■ A ccess time 430 ns (5 V CDP65516-43 550 ns (5 V) CDP65516-55 • Low po w e r dissipation

80c555

Abstract: NS32490 dp8390 DGSS
Contextual Info: NATL SEMICOND -CUP/UO ÖO &5Q1128 N A T L S EM I CO ND, dË | bSOllSfl OOSSSTb T | ~ CÜP/UC 80C 55596 PRELIMINARY DP8390/NS32490 Network Interface Controller General Description Table of Contents The DP8390/NS32490 Network Interface Controller NIC) Is à microCMOS VLSI.device designed to ease interfacing with

Contextual Info: 1-Cube IQ Family Data Sheet Description Features • E ight d evices ra n g in g from 32 to 320 I / O P orts • SR A M -based P ro g ra m m in g for In-system R econfigurability • Sw itch M atrix A rchitecture • N on-blocking • P redictable & U niform D elays

MC14069

Abstract: 32-bit shift register
Contextual Info: Advance • s 4 DATA S H E E T LC1092AP/BP AC PLASMA DISPLAY COLUMN DRIVERS DESCRIPTION The LC1092AP and LC1092BP are high-voltage CMOS HV-CMOS integrated circuits that are assembled in 44-pin plastic J-leaded chip carriers. The LC1092BP pinout alignment is the mirror image of the LC1092AP pinout alignment (see Figures 2 and