STM-16 ARCHITECTURE Search Results

CY7C9538

Abstract: CYS25G0101DX cypress 1994 sram zero concatenated and OC-3 and STM-1 3C6V 1xVC4-16c T1X15
Contextual Info: CONFIDENTIAL CY7C9538 OC-48/STM-16 Framer with Reconfigurable VC–POSIC2GVC-R Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Programmable frame tagging engine for packet preclassification enables such features as

SDH 209

Abstract: 1xVC4-16c CY7C9538 CYS25G0101DX VC45V
Contextual Info: CONFIDENTIAL CY7C9538 OC-48/STM-16 Framer with Reconfigurable VC–POSIC2GVC-R Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Programmable frame tagging engine for packet preclassification enables such features as

sfp s1.1

Abstract: S3 L13 SFP EVAL BOARD STS-48 XRT91L80 power supply tester schematic diagram stm16 sfp
Contextual Info: EVM-91L80 STS-48/STM-16 SONET/SDH XRT91L80 Evaluation Board User Manual Nov 2, 2005 2.488/2.667 GBPS STS-48/STM-16 SONET/SDH XRT91L80 Transceiver Evaluation Board User Manual 1 EVM-91L80 STS-48/STM-16 SONET/SDH XRT91L80 Evaluation Board User Manual Nov 2, 2005

CY7C9537B

Abstract: CYS25G0101DX T1X15
Contextual Info: CONFIDENTIAL CY7C9537B OC-48/STM-16 Framer–POSIC2G Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated — Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] — Complies with Bellcore GR253 rev.1, 1997[3]

SFP EVAL BOARD

Abstract: STS-48 XRT91L82 power supply tester schematic diagram EVM-91L82
Contextual Info: EVM-91L82 STS-48/STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25, 2006 2.488/2.667 GBPS STS-48/STM-16 SONET/SDH XRT91L82 Transceiver Evaluation Board User Manual 1 EVM-91L82 STS-48/STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25, 2006

nobl sram 1994

Abstract: CY7C9536B-BLC CY7C9536B CYS25G0101DX VC45V
Contextual Info: CONFIDENTIAL CY7C9536B OC-48/STM-16 Framer with VC - POSIC2GVC Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] • Complies with Bellcore GR253 rev.1, 1997

T1X15

Abstract: CY7C9536B CYS25G0101DX OIF-SPI3-01 TRS-X
Contextual Info: CONFIDENTIAL CY7C9536B OC-48/STM-16 Framer with VC - POSIC2GVC Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] • Complies with Bellcore GR253 rev.1, 1997

10UTOPIA

Abstract: CY7C9537B CYS25G0101DX 6AE11
Contextual Info: CONFIDENTIAL CY7C9537B OC-48/STM-16 Framer–POSIC2G Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated — Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] — Complies with Bellcore GR253 rev.1, 1997[3]

CY7C9536B-BLC

Abstract: CY7C9536B CYS25G0101DX RXD13
Contextual Info: CONFIDENTIAL CY7C9536B OC-48/STM-16 Framer with VC - POSIC2GVC Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] • Complies with Bellcore GR253 rev.1, 1997

D1 3009k

Abstract: 6 pin 2D 1002 ring COUNTER
Contextual Info: IBM3009K2672 IBM SONET/SDH Framer Features • Integrated clock recovery and synthesis for four OC-3c/STM-1 signals or one OC-12/OC-12c/ STM-4/STM-4c signal • OC-12/STM-4 or quad OC-3c/STM-1 framing and performance monitoring • Expansion port for OC-48/STM-16 operation

T1X15

Abstract: CY7C9536B-BLC cfk logic chip CY7C9536B CYS25G0101DX
Contextual Info: CONFIDENTIAL CY7C9536B OC-48/STM-16 Framer with VC - POSIC2GVC Features • OC-48/STS-48/STM-16, OC-12/STS-12/STM-4, OC-3/STS3/STM-1 rates, concatenated and non-concatenated • Complies with ITU-Standards G.707/Y.1322 and G.783[1,2] • Complies with Bellcore GR253 rev.1, 1997

Contextual Info: EtherPHAST -48 Plus Device OC-48/STM-16 SONET/SDH Ethernet Mapper TXC-06742 DATA SHEET PRODUCT PREVIEW TXC-06742-MB, Ed. 4 December 2005 FEATURES APPLICATIONS • 1x STS-48/STM-16 or 4x STS-12/STM-4 framer with TOH processing, 4x 622 LVDS line side interface

VSC8115

Abstract: OC-48 AU-4-16c VSC8144 VSC9182 VSC9184 474-pin
Contextual Info: Pointer Processor and Frame Aligner VSC9184 Product Brief TimeStream Product Family Features & Benefits: • Bi-directional STS-48/STM-16, Quad STS-12/STM-4, or Quad STS-3/STM-1 Section and Line Termination Device with Integrated Pointer Processing • Optional STS-3|12/STM-1|4 to

SDVB

Abstract: PM5312 PM5355 S3045
Contextual Info: DEVICE SPECIFICATION SONET/SDH OC-12 TO OC-48 MUX/DEMUX SONET/SDH OC-12 TO OC-48 MUX/DEMUX S3045 S3045 APPLICATIONS FEATURES • Complies with Bellcore and ITU-T specifications • Supports STS-12/STM-4 to STS-48/STM-16 Mux/Demux functions • 8-bit LVDS data path for STS-48/STM-16 data

S3047

Abstract: U311D XS-3045
Contextual Info: PRELIMINARY DEVICE SPECIFICATION > 4 M C SO N E T/SD H O C -12 TO OC-48 MUX/DEIWUX FEATURES • Complies with ANSI, Bellcore and ITU-T specifications • Supports STS-12/STM-4 to STS-48/STM-16 Mux/Demux functions • 8-bit LVDS data path for STS-48/STM-16 data

Contextual Info: DEVICE SPECIFICATION SONET/SDH OC-12 TO OC-48 MUX/DEMUX SONET/SDH OC-12 TO OC-48 MUX/DEMUX S3045 S3045 APPLICATIONS FEATURES • Complies with Bellcore and ITU-T specifications • Supports STS-12/STM-4 to STS-48/STM-16 Mux/Demux functions • 8-bit LVDS data path for STS-48/STM-16 data

234h

Abstract: GR-253 TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7
Contextual Info: Preliminary Data Sheet August 2000 TRCV012G5 2.5 Gbits/s and TRCV012G7 (2.5 Gbits/s and 2.7 Gbits/s) Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • TRCV012G5 supports OC-48/STM-16 data rate ■ TRCV012G7 supports: — OC-48/STM-16 data rate

Contextual Info: DEVICE SPECIFICATION > 4M C SONET/SDH OC-12 TO OC-48 MUX/DEMUX FEATURES • Complies with ANSI, Bellcore and ITU-T specifications • Supports STS-12/STM-4 to STS-48/STM-16 Mux/Demux functions • 8-bit LVDS data path for STS-48/STM-16 data • 8-bit LVTTL data path with parity for each

sd 4841 p

Contextual Info: DEVICE SPECIFICATION SONET/SDH OC-12 TO OC-48 MUX/DEMUX SONET/SDH OC-12 TO OC-48 MUX/DEMUX S3045 S3045 APPLICATIONS FEATURES • Complies with Bellcore and ITU-T specifications • Supports STS-12/STM-4 to STS-48/STM-16 Mux/Demux functions • 8-bit LVDS data path for STS-48/STM-16 data

Contextual Info: BCM8228 VARIRATE MULTIRATE TRANSCEIVER WITH SONET RATE ADAPTATION AND PERFORMANCE MONITORING SUMMARY OF BENEFITS FEATURES • Highly-integrated rate-adaptation device that maps a single STS-3/ STM-1 or a single STS-12/STM-4 stream into STS-48/STM-16 frames.

BCM8228

Abstract: OC48 STM-16 STS-48
Contextual Info: BCM8228 VARIRATE MULTIRATE TRANSCEIVER WITH SONET RATE ADAPTATION AND PERFORMANCE MONITORING SUMMARY OF BENEFITS FEATURES • Highly integrated rate-adaptation device that maps a single STS-3/ STM-1 or a single STS-12/STM-4 stream into STS-48/STM-16 frames

GR-253

Abstract: TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7 ast0
Contextual Info: Advance Data Sheet February 2000 TRCV012G5 2.5 Gbits/s and TRCV012G7 2.7 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • TRCV012G5 supports OC-48/STM-16 data rate ■ TRCV012G7 supports: — OC-48/STM-16 data rate — RS 255, 239 forward error correction (FEC)

Contextual Info: Si5017 OC-48/STM-16 SONET/SDH CDR IC WITH L IMITING A MPLIFIER Features High-speed clock and data recovery device with integrated limiting amplifier: ! ! Loss-of-signal level alarm ! Data slicing level control ! 10 mVPP differential sensitivity Supports OC-48/STM-16 and

SI5100-G-BC

Contextual Info: Si5100 SiPHY OC-48/STM-16 SONET/SDH T RANSCEIVER Features Complete, low-power, high-speed, SONET/SDH transceiver with integrated limiting amp, CDR, CMU, and MUX/DEMUX Data rates supported: SONET-compliant loop timed OC-48/STM-16 through 2.7 Gbps operation