STANDARD TTL Search Results

Contextual Info: intei 4289 STANDARD MEMORY INTERFACE • 40 Pin Dual In-Line Package Direct Interface to all Standard Memories Allows Read and Write Program Memory Single Package Equivalent of 4008/4009 TTL Compatible Address, Chip Select, Program Memory Data Lines ■ Standard Operating

Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Data Sheet High Performance SLX Family Low Power GaAs Standard Cell Arrays Features • Standard Cell Core • Low-Power Macros Available • Five Array Sizes: 10K, 26K, 48K, 72K and 110K Usable Gates • Standard TTL, LVTTL, ECL, LVPECL, GTL,

Contextual Info: MSO Series 5V 9x14mm Surface Mount Crystal Clock Oscillators Œ Œ Œ Œ Œ Œ TTL/CMOS Compatible Anti-Static Tube or Tape & Reel Packaging 1.5 to 40 MHz Frequency Range 40/60% Symmetry Standard 45/55% Symmetry Standard ±100ppm Stability Standard ±50ppm Stability Available

Contextual Info: Voltage Controlled Temperature Compensated Crystal Oscillators SXO-6000C SERIES TTL/CMOS LOGIC VC TCXO SXO-6000C STANDARD SMD VCTCXO STANDARD SPECIFICATIONS H-CMOS VCTCXO Item Part number Frequency range Initial frequency tolerance Frequency stability Temperature range

16R8

Abstract: GAL16LV8ZD GAL16LV8ZD-15QJ GAL16LV8ZD-25QJ GAL16V8
Contextual Info: Specifications GAL16LV8ZD GAL16LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

16R8

Abstract: GAL16LV8ZD GAL16LV8ZD-15QJ GAL16LV8ZD-25QJ GAL16V8
Contextual Info: Specifications GAL16LV8ZD GAL16LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

Contextual Info: GAL16LV8ZD Lattica Low Voltage, Zero Power E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Com patible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

ACT14

Contextual Info: AC14 • ACT14 54AC/74AC14 • 54ACT/74ACT14 Hex Inverter Schmitt Trigger Description Connection Diagrams The ’AC/’ACT14 contains six logic inverters which accept standard CMOS input signals TTL levels for ’ACT14 and provide standard CMOS output levels.

Contextual Info: GAL20LV8ZD Lattica Low Voltage, Zero Power E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Com patible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

TTL 7414

Abstract: TTL 7414 data 7414 74LS14 function table 7414 hex not 7414 ttl inverter schmitt trigger 7414 7414 equivalent pin configuration 74LS14 ls14
Contextual Info: 7414, LS14 Signetics Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification Logic Products DESCRIPTION The '14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly

74CO4

Abstract: SPICE MODELS ALD1101 ALD SPICE Macromodels FSK11 Design kit SPICE ALD1101 ald1701a dice project ALD1704 74C04 ALD1102
Contextual Info: A PRACTICAL SOLUTION to CUSTOM LINEAR I.C.'s — ALD’s “FUNCTION-SPECIFIC” ASIC PROGRAM “FUNCTION-SPECIFIC” is ALD’s standard cell approach to custom linear circuits with the standard cells being ALD standard products. It allows you to design with completely specified standard linear I.C.’s and implement your custom

74f132 national

Abstract: 54F132DM 54F132FM 54F132LM 74F132PC F132 J14A M14A M14D N14A
Contextual Info: General Description The ’F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In

74ACT14 motorola

Abstract: 74AC ACT14 MC74AC14 MC74ACT14 DSA003657
Contextual Info: MC74AC14 MC74ACT14 Hex Inverter Schmitt Trigger The MC74AC14/74ACT14 contains six logic inverters which accept standard CMOS Input signals TTL levels for MC74ACT14 and provide standard CMOS output levels. They are capable of transforming slowly changing input signals into

GAL20LV8ZD

Abstract: GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8
Contextual Info: Specifications GAL20LV8ZD GAL20LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

ACT14

Contextual Info: AC14 • ACT14 54AC/74AC14 • 54ACT/74ACT14 Hex Inverter Schm itt Trigger Description Connection Diagrams The ’AC/’ACT14 contains six logic inverters which accept standard CMOS input signals TTL levels for ’ACT14 and provide standard CMOS output levels.

1N4306

Abstract: 1N941 1N43064
Contextual Info: Cal Crystal Lab, Inc./Comclok, Inc. 800-333-9825 TTL CLOCK OSCILLATORS FULL & HALF SIZE MODEL CO 5.0VDC Model CO CO Frequency Range 10kHz ~ 69.999MHz 70MHz ~ 160.0MHz Frequency Stability 100ppm Standard, Optional Tolerances Available 100ppm Standard, Optional Tolerances Available

GAL20LV8ZD

Abstract: GAL20LV8ZD-15QJ GAL20LV8ZD-25QJ GAL20V8
Contextual Info: Specifications GAL20LV8ZD GAL20LV8ZD Low Voltage, Zero Power E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • 3.3V LOW VOLTAGE, ZERO POWER OPERATION — JEDEC Compatible 3.3V Interface Standard — Interfaces with Standard 5V TTL Devices

Contextual Info: GD74F04 PRELIMINARY DATA SHEET HEX INVERTER Description Pin Configuration The GD74F04 contains 6 logic inverters which accept standard TTL input signal and standard TTL output level. They have a greater noise margin than conventional inverters. Vcc 6Y 6A 5Y

MC74ACT14

Contextual Info: Hex Inverter Schmitt Trigger The MC74AC14/74ACT14 contains six logic inverters which accept standard CMOS Input signals TTL levels for MC74ACT14 and provide standard CMOS output levels. They are capable of transforming slowly changing input signals into sharply defined,

smd 5v

Abstract: hcmos ttl
Contextual Info: C32xx Model 5x7 mm SMD, 5V, HCMOS/TTL Frequency Range: Frequency Stability Options: Temperature Range: standard (Option “M”) (Option “E”*) Storage: Input Voltage: Input Current: Output: Symmetry: (Standard “2”) (Option “9”) Rise/Fall Time:

schmitt trigger 7414

Abstract: 7414 TTL 7414 7414 ttl inverter TTL 7414 data TTL Schmitt-Trigger Inverters 74ls inverters 1N916 74LS LS14
Contextual Info: Signetìcs 7414, LS14 Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification Logic Products DESCRIPTION The '14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly

Contextual Info: Signetics 5 4F14 Schmitt Trigger Hex Inverter Schmitt Trigger Product Specification Military Logic Products DESCRIPTION The 54F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly

Contextual Info: C32xx Model 5x7 mm SMD, 5V, HCMOS/TTL Frequency Range: Frequency Stability Options: Temperature Range: standard (Option “M”) (Option “E”*) Storage: Input Voltage: Input Current: Output: Symmetry: (Standard “2”) (Option “9”) Rise/Fall Time:

GD74F04

Contextual Info: GD74F04 PRELIMINARY DATA SHEET HEX INVERTER Description The GD74F04 contains 6 logic inverters which accept standard TTL input signal and standard TTL output level. They have a greater noise margin than conventional inverters. Pin Configuration Vcc 6Y 6A 5Y