ST ZO 109 MA Search Results

IP3 MARK

Abstract: aabl
Contextual Info: 19-1181; Rev 1; 7/9? J ¥ ìj ixiyü _ GeneraI Description The MAX2630/MAX2631/MAX2632/MAX2633 are lowvoltage, low-noise am plifiers for use from VHF to microwave frequencies. Operating from a single +2.7V to +5.5V supply, these devices have a fla t gain

TRANSISTOR J 5804 NPN

Abstract: nec 2501 LD 229 transistor NEC D 986 NEC 2501 MF 216 nec 2501 LD 325 tfr 586 nec 2501 Le 629 CD 1691 CB MC 151 transistor 567/triac ZO 410 MF
Contextual Info: DATA SHEET SILICON TRANSISTOR 2SC4885 NPN SILICON EPITAXIAL TRANSISTOR 3 PINS SUPER MINI MOLD PACKAGE DIMENSIONS Units: mm FEATURES • Excellent Low NF in Low Frequency Band 2.1 ± 0.1 • Low Voltage Use 1,25±0.1 • Low C o b : 0.9 p F T Y P . • Low Noise Voltage : 90 mV TYP.

HD100170

Abstract: HD100170F
Contextual Info: H D 100170 Universal Demultiplexer/Decoder Signals applied to auxiliary inputs Ha, H b and He determine whether the outputs are active high or The H D100170 Universal Demultiplexer/Decoder functions as either a dual Mode Control inp u t M . In the dual mode, each half has a pair of active low

Contextual Info: r e « HEW LETT mLUM P A C K A R D Low Current, High Perform ance NPN Silicon Bipolar Transistor Technical Data AT-32011 AT-32033 F eatures Description • High Performance Bipolar Transistor Optimized for Low Current, Low Voltage Operation • 900 MHz Performance:

AM26S11 equivalent

Abstract: AM2907 A0LA 1N916 AM26S10 26S12
Contextual Info: Am26S10/Am26S11 Am26S10/Am26S11 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • Input to bus is inverting on Am 26S10 Input to bus is non-inverting on Am 26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.6V maximum

Contextual Info: H D 100170 Universal D em ultiplexer/D ecoder The H D 1 0 0 1 7 0 Universal D em ultiplexer/D eco der Signals applied to auxiliary inputs Ha, H b and He functions as either a dual Mode Control in p u t M . determ ine whether the outputs are active high or

Contextual Info: HEWLETT-PACKARD/ CMPNTS LIE W hat H EW LETT A "KM P A C K A R D B • 4 4 4 7 5 3 4 D 0 1 0 0 S 7 bSO MSA-0300 MODAMP Cascadable Silicon Bipolar Monolithic Microwave Integrated Circuit Amplifiers Features • • • • Chip Outline1 Cascadable 50 Q Gain Block

Contextual Info: r 6 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - n 5 4 2 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST DF DO R E V IS IO N S LTR DESCRIPTION A R A IS E D CAVITYDENTI FI CATION N U M B E R R.100 +.003 T Y P [2,54 +0,08]

Contextual Info: HEWLETT-PACKARD/ blE D CHPNTS That HEWLETT wL'K M PACKARD • 4 4 4 7 56 4 0 0 1 0 1 4 b 7£b MSA-1105 MODAMP Cascadable Silicon Bipolar Monolithic Microwave Integrated Circuit Amplifiers 05 Plastic Package Features • High Dynamic Range Cascadable 50 £2 or 75 £2 Gain Block

Contextual Info: T D R A WI N G THIS MADE IN D R A WI N G THIRD IS ANGLE UNRUBLI S H E D , COPYRIGHT 6 B 2 3 4 PROJECTION RELEASED 19 BY AMP FOR LOC PUBLICATION INCORPORATED. ALL INTERNATIONAL RIGHTS D I ST REV I 5 I0N5 DF RESERVED. ZONE LTR D E S C R I P T I ON B -D -►

ablebond 84-1

Abstract: amplifier 5.1 surrounding system circuit diagram zo 107 Ablebond Ablebond 36-2 AMMC-5618 AMMC-5618-W10 AMMC-5618-W50 DS21 80X80
Contextual Info: AMMC - 5618 6 - 20 GHz Amplifier Data Sheet Description Avago Technologies’ AMMC-5618 6-20 GHz MMIC is an efficient two-stage amplifier designed to be used as a cascadable intermediate gain block for EW applications. In communication systems, it can be used as a LO buffer,

AMMC-5618-W10

Abstract: AMMC-5618-W50 DS21 AMMC-5618
Contextual Info: AMMC - 5618 6 - 20 GHz Amplifier Data Sheet Description Avago Technologies’ AMMC-5618 6-20 GHz MMIC is an efficient two-stage amplifier designed to be used as a cascadable intermediate gain block for EW applications. In communication systems, it can be used as a LO buffer,

Contextual Info: LETT It’ll HEW PACKARD MSA-0400 MODAMP Cascadable Silicon Bipolar Monolithic Microwave Integrated Circuit Amplifiers Features • • • • Chip Outline1 Cascadable 50 n Gain Block 3 dB Bandwidth: DC to 4.0 GHz 16.0 dBm typical Pi dB at 1.0 GHz 8.5 dB typical Gain at 1.0 GHz

Contextual Info: 7 DRAWI NG THIS MADE IN DRAWI NG THIRD IS ANGLE UNRUBLI S H E D , COPYRIGHT 6 B 2 3 4 PROJECTION RELEASED 19 BY AMP F OR LOC PUBLICATION INCORPORATED. ALL INTERNATIONAL RIGHTS D I ST R EV I 5 I 0 N5 DF RESERVED. ZONE LTR A - - / D / \ . 69]

Contextual Info: TFP201, TFP201A TI PanelBus DIGITAL RECEIVER SLDS116 - MARCH 2000 D D D D D D D Supports SXGA Resolution Output Pixel Rates Up to 112 MHz Digital Visual Interface (DVI) Specification Compliant1 True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock

SC660E

Abstract: SC660EYB
Contextual Info: SC660E SMBus System Clock Buffer for Mobile Applications Product Features Product Description § 10 output buffers for high clock fanout applications § Each output can be internally disabled for EMI and The device is a high fanout system clock distributor. Its

IMISC660

Abstract: IMISC660CYB SC660C
Contextual Info: SC660C I2C System Clock Buffer for Mobile Applications Approved Product PRODUCT FEATURES PRODUCT DESCRIPTION S 10 output buffers for high clock fanout applications S Each output can be internally disabled for EMI and power consumption reduction. S Separate power supply for each group of 2 clock

Contextual Info: rm mn SC660E i » M « § w iir tfe s a f f C System Clock Buffer for Mobile Applications Approved Product PRODUCT FEA TURES PRODUCT DESCRIPTION • 10 output buffers for high clock fanout applications ■ Each output can be internally disabled for EMI and

Contextual Info: SC660E f C System Clock Buffer for Mobile Applications Approved Product PRODUCT FEA TURES • 10 output buffers for high clock fanout applications ■ Each output can be internally disabled for EMI and power consumption reduction. ■ Separate power supply for each group of 2 clock

IMISC660

Abstract: IMISC660EYB SC660E SC660EYB
Contextual Info: SC660E I2C System Clock Buffer for Mobile Applications Approved Product Product Features Product Description S 10 output buffers for high clock fanout applications S Each output can be internally disabled for EMI and The device is a high fanout system clock distributor. Its

IS-94 mux

Abstract: Str x 5459
Contextual Info: VITESSE 4 0 0 M b /s 6 4 x 6 4 C r o s s p & tiit S w itc h FEATURES • • • • • Superior Performance: 400 Mb/s • Operating Range: 0° to +70° C • Power Dissipation: 9.4 W atts Nominal , 14.7 W atts (Max) • Clocked or Flow-Through Operation

IC 74HC14 ST MAKE

Abstract: 11801B IN16P AD8150 OC-24 AD8150-EVAL 149W
Contextual Info: 33 x 17, 1.5 Gbps Digital Crosspoint Switch AD8150 FEATURES FUNCTIONAL BLOCK DIAGRAM INP INN CS RE A 7 5 FIRST RANK 17  7-BIT LATCH SECOND RANK 17  7-BIT LATCH INPUT DECODERS D 33 OUTPUT ADDRESS DECODER 33 17 OUTP 33  17 DIFFERENTIAL SWITCH MATRIX

AD8150

Abstract: OC-24 AD8150-EVAL IN20N
Contextual Info: 33 x 17, 1.5 Gbps Digital Crosspoint Switch AD8150 FEATURES FUNCTIONAL BLOCK DIAGRAM INP INN CS RE A 7 5 FIRST RANK 17 × 7-BIT LATCH SECOND RANK 17 × 7-BIT LATCH INPUT DECODERS D 33 OUTPUT ADDRESS DECODER 33 17 OUTP 33 × 17 DIFFERENTIAL SWITCH MATRIX 17

B9688

Abstract: CLK12 IMIB9688
Contextual Info: B9688 I2C System Clock Buffer Preliminary Product Features Product Description S 18 output buffer for high clock fanout applications S Each output can be disabled through I C for reductions of EMI/power consumption S 3.3 volts operation S Output frequency range 10 Mhz to 100 MHz