SRAM DATASHEET Search Results

PSEUDO SRAM

Abstract: SRAM HIO15
Contextual Info: 16Mb Pseudo SRAM IS66WV1M16DBLL ► Applications ISSI is now sampling a 16Mb Pseudo SRAM, the latest addition to our SRAM portfolio. 16Mb Pseudo SRAM provides a cost effective solution to a standard SRAM socket. The pinout of the 16Mb PSRAM is identical to the regular 16Mb LP SRAM,

28F3202C3

Abstract: 29066
Contextual Info: PRODUCT PREVIEW 3 VOLT ADVANCED+ STACKED CHIP SCALE PACKAGE MEMORY 16-Mbit Flash + 2-Mbit SRAM - 28F1602C3 16-Mbit Flash + 4-Mbit SRAM - 28F1604C3 32-Mbit Flash + 4-Mbit SRAM - 28F3204C3 32-Mbit Flash + 2-Mbit SRAM - 28F3202C3 ! Flash Memory Plus SRAM

Contextual Info: 1Mb SRAM Datasheets Preliminary

PC107A

Abstract: microprocessor PC107
Contextual Info: PC107A PCI Bridge Memory Controller Datasheet Features • Processor Bus Frequency up to 100 MHz • 64- or 32-bit Data Bus and 32-bit Address Bus • Provides Support for Either Asynchronous SRAM, Burst SRAM, or Pipelined Burst SRAM Compliant with PCI Specification, Revision 2.1

sram 2114

Abstract: ACTEL FUSION AFS1500 AC252 2114 SRAM actel smart fusion transistor AC252
Contextual Info: Application Note AC252 Configuring SRAM FPGAs Using Actel Fusion Introduction Due to the nature of SRAM technology, SRAM-based FPGAs are volatile. Therefore, SRAM-based FPGAs lose their configuration when powered off and need to be reconfigured at every power-up. Hence, almost

Contextual Info: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1327G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

cy7c1339g-133axi

Abstract: c1339g
Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1327G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1327G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1329H 2-Mbit 64 K x 32 Pipelined Sync SRAM 2-Mbit (64 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1329H SRAM integrates 64 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1327G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1327G 4-Mbit 256 K x 18 Pipelined Sync SRAM 4-Mbit (256 K × 18) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1327G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1339G SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1329H 2-Mbit 64 K x 32 Pipelined Sync SRAM 2-Mbit (64 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1329H SRAM integrates 64 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1329H 2-Mbit 64 K x 32 Pipelined Sync SRAM 2-Mbit (64 K × 32) Pipelined Sync SRAM Features Functional Description • Registered inputs and outputs for pipelined operation The CY7C1329H SRAM integrates 64 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter

Contextual Info: CY7C1339G 4-Mbit 128 K x 32 Pipelined Sync SRAM 4-Mbit (128 K × 32) Pipelined Sync SRAM Features Functional Description The CY7C1339G [1] SRAM integrates 128 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are

Contextual Info: SRAM AS8S128K32 128K x 32 SRAM GENERAL 21, 28, 39 are no connects PN 66 DESCRIPTION Lead PGA- Pins 8, SRAM MEMORY ARRAY The AS8S128K32 is a 4 Megabit CMOS SRAM Module organized as 128Kx32-bits and user configurable to 256Kx16 or 512Kx8. The AS8S128K32 achieves high speed access, low

Contextual Info: Standard Products UT8ER1M32 32Megabit SRAM MCM UT8ER2M32 64Megabit SRAM MCM UT8ER4M32 128Megabit SRAM MCM Data Sheet January, 2013 www.aeroflex.com/memories INTRODUCTION The UT8ER1M32, UT8ER2M32, and UT8ER4M32 are high performance CMOS static RAM multichip modules MCMs

MC19

Contextual Info: INTEGRATED CIRCUITS PZ3320C/PZ3320N 320 macrocell SRAM CPLD Preliminary specification IC27 Data Handbook Philips Semiconductors 1998 Jul 22 Philips Semiconductors Preliminary specification 320 macrocell SRAM CPLD PZ3320C/PZ3320N FEATURES DESCRIPTION • 320 macrocell SRAM based CPLD

Contextual Info: CY7C1329H 2-Mbit 64 K x 32 Pipelined Sync SRAM 2-Mbit (64 K × 32) Pipelined Sync SRAM Features Functional Description The CY7C1329H[1] SRAM integrates 64 K × 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by

Contextual Info: Standard Products UT8ER1M32 32Megabit SRAM MCM UT8ER2M32 64Megabit SRAM MCM UT8ER4M32 128Megabit SRAM MCM Data Sheet January, 2013 www.aeroflex.com/memories INTRODUCTION The UT8ER1M32, UT8ER2M32, and UT8ER4M32 are high performance CMOS static RAM multichip modules MCMs