SR81995C32 Search Results

NS125

Contextual Info: ISSI IS61C632A 32K x 32 SYNCHRONOUS FAST STATIC RAM PRELIMINARY JANUARY 1997 FEATURES DESCRIPTION • Fast access time: The IS S IIS61C632A is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

IS61C632

Abstract: 5C-32
Contextual Info: ISSI IS61C632 32K x 32 SYNCHRONOUS FAST STATIC RAM septeT berims FEATURES DESCRIPTION • Fast access time: - 8.5 ns-66 MHz;10 ns-60 MHz; 12 ns-50 MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: ISSI 32K x 32 SYNCHRONOUS FAST STATIC RAM ADVANCE INFORMATION SEPTEMBER 1995 FEATURES DESCRIPTION • Fast access time: The IS S IIS61C632A is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

Contextual Info: ISSI IS61C632 32K x 32 SYNCHRONOUS FAST STATIC RAM P R E L IM IN A R Y S E P T E M B E R ! 995 FEATURES DESCRIPTION • The IS S IIS61C632 is a high-speed, low-power synchronous sta tic RAM desig ned to pro vid e a b u rsta ble, highperformance, secondary cache for the i486 , Pentium™,

Contextual Info: ISSI IS61C632 32K x 32 SYNCHRONOUS FAST STATIC RAM PRELIMINARY SEPTEMBER-! 995 FEATURES DESCRIPTION • The IS S I IS61C632 is a high-speed, low-power synchronous s ta tic RAM d e sig n e d to pro vid e a b u rsta ble, highperformance, secondary cache for the i486 , Pentium™,

Contextual Info: ISSI IS61C632A 32K x 32 SYNCHRONOUS FAST STATIC RAM ADVANCE INFORMATION SEPTEMBER 1995 FEATURES DESCRIPTION • The IS SI IS61C632A is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

high power fast recovery diodes 5 ns

Abstract: IS61C632A
Contextual Info: ISSI ISSI IS61C632A IS61C632A 32K x 32 SYNCHRONOUS FAST STATIC RAM FEATURES • Fast access time: – 5 ns-100 MHz; 6 ns-83 MHz; 7 ns-75 MHz; 8 ns-66 MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and