Part Number
    Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    SPRA750 Search Results

    SPRA750 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    B1137

    Abstract: 2n2 f250 branch metric viterbi algorithm Convolutional Encoder TMS320C6416 Transistor y2n TMS320C6000 TR45
    Contextual Info: Application Report SPRA750D - September 2003 Using TMS320C6416 Coprocessors: Viterbi Coprocessor VCP Jelena Nikolic-Popovic Digital Signal Processing Solutions ABSTRACT Viterbi Coprocessor (VCP) is a programmable peripheral for decoding of convolutional


    Original
    spra750dtms320c6416b11372n2 f250+6branch metricviterbi algorithmconvolutional encodertransistor y2ntms320c6000tr45 PDF

    B1137

    Abstract: branch metric trellis 5/6 decoder TMS320C6000 TMS320C6416 TR45 SPRU533 convolutional
    Contextual Info: Application Report SPRA750 - June 2001 Using TMS320C6416 Coprocessors: Viterbi Coprocessor VCP Jelena Nikolic-Popovic Digital Signal Processing Solutions ABSTRACT Viterbi Coprocessor (VCP) is a programmable peripheral for decoding of convolutional codes, integrated into Texas Instruments’ TMS320C6416 DSP device. The VCP is controlled


    Original
    spra750tms320c6416b1137branch metric+5trellis 5/6 decodertms320c6000tr45spru533convolutional PDF

    Contextual Info: TMS320C6418 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS241C August 2004 − Revised May 2005 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include


    Original
    tms320c6418sprs241csprs241b PDF

    specifications of ic 1408

    Abstract: Turbo IC SPRU190 TMS320C6000 TMS320C6416 convolutional encoder interleaving probability distribution function
    Contextual Info: Application Report SPRA974 − November 2003 TMS320C6416 Coprocessors and Bit Error Rates Sebastien Tomas, Mattias Ahnoff, Patrick Geremia, Pierre Bertrand Wireless Infrastructure ABSTRACT The turbo and viterbi coprocessors TCP/VCP are programmable peripherals used to


    Original
    spra974tms320c6416is2000/3gppspecifications of ic 1408+5turbo icspru190tms320c6000convolutional encoder interleavingprobability distribution function PDF

    TMS320C6416-6E3

    Abstract: application note c6000 utopia 532-PIN BALL SPRC092 TMDX3260E6416 C6416 teb
    Contextual Info: TMS320C6414, TMS320C6415, TMS320C6416 FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS146G – FEBRUARY 2001 – REVISED MARCH 2003 D D D D D Signal Processors DSPs – 2-, 1.67-, 1.39-ns Instruction Cycle Time – 500-, 600-, 720-MHz Clock Rate – Eight 32-Bit Instructions/Cycle


    Original
    tms320c6414tms320c6415tms320c6416sprs146g+1239-ns720-mhz32-bitc6414/15/16tms320c64x32-/40-bittms320c6416-6e3application note c6000 utopia532-pin ballsprc092tmdx3260e6416c6416 teb PDF

    SPRU190D

    Abstract: SPRU401D SPRU534 SPRU189F TMS320C64x programming TMS320C6000 TMS320C6416 XDS510 rts6400 9f02
    Contextual Info: Application Report SPRA838A - February 2004 TMS320C6416 Power-On Self Test David Abensur Sebastien Tomas Wireless Infrastructure Applications ABSTRACT The Power-On Self Test POST is designed to verify the operation of the TMS320C6416. Six modules are included in this test: Chk6xTest, MemoryEdmaTest, VcpTest, TcpTest,


    Original
    spra838atms320c6416spru190dspru401d+7spru534spru189ftms320c64x programmingtms320c6000xds510rts64009f02 PDF