FSPLL870SA
Abstract: FSPLL950SA SPLL121SA
Contextual Info: INTEGRATED FREQUENCY FREQUENCY INTEGRATED SYNTHESIZERS SYNTHESIZERS Click on package to view outline drawing 124SL FREQUENCY RANGE MHz DC BIAS REQUIREMENTS STEP SIZE (KHz) Vcc1 & 2 (Volts) OUTPUT POWER CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec)
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124slkhz/100lmx2320lmx2325+4lmx2332afspll870safspll950saspll121sa
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SPLL121SA
Abstract: SPLL950SB SPLL41SA SPLL139SA
Contextual Info: INTEGRATED FREQUENCY SYNTHESIZERS INTEGER PLL FREQUENCY RANGE MHz DC BIAS REQUIREMENTS STEP SIZE (KHz) 197 124SL Vcc1 & 2 (Volts) OUTPUT POWER CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec) TYPICAL PHASE NOISE dBc/Hz Offset at 10 KHz/100 KHz TYPICAL
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124slkhz/100lmx2320lmx2325+5adf4113spll121saspll950sbspll41saspll139sa
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hp 502
Abstract: hp502 CLP-202 K705 k706 738s K714 ir p924 k734 SMD-C3
Contextual Info: o._8 8 OPPÖÖO 7 7 7 oooo 7777777777777777777777777777777777777777 71T’ 7,|71717, Tl71717171711n717171T7,717, T171717, 7171T,7î T,T,T,T o , ' \ • 'm o œ œ c n r o o ) u i m u i u i u i u i u i M N i r o N ) O O O Q O O ü - * o o Q Q O ,n x !r? ; ^ ;i'- - iO > c n A 0 3 î \s - i a > ''J O > A O > fo -k o>iro-‘ O C i> a » A c 3 N > -* O O ü iA c 3 N > -* '
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tl71717171711171t7t1717177171t+10hp 502hp502clp-202k705k706738sk714ir p924k734smd-c3
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SPLL950SB
Abstract: SPLL121SA
Contextual Info: INTEGRATED FREQUENCY SYNTHESIZERS 124SL FREQUENCY RANGE MHz DC BIAS REQUIREMENTS STEP SIZE (KHz) Vcc1 & 2 (Volts) OUTPUT POWER CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec) 198 197 TYPICAL PHASE NOISE dBc/Hz Offset at 10 KHz/100 KHz TYPICAL HARMONIC
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124slkhz/10035sizelmx2320+4lmx2325lmx2332aspll950sbspll121sa
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SPLL41SA
Abstract: SPLL121SA
Contextual Info: INTEGRATED FREQUENCY SYNTHESIZERS INTEGER PLL FREQUENCY RANGE MHz DC BIAS REQUIREMENTS STEP SIZE (KHz) 197 124SL Vcc1 & 2 (Volts) OUTPUT POWER CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec) TYPICAL PHASE NOISE dBc/Hz Offset at 10 KHz/100 KHz TYPICAL
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124slkhz/100lmx2325lmx2332a+3adf3114spll41saspll121sa
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SPLL121SA
Contextual Info: INTEGRATED FREQUENCY SYNTHESIZERS 124S SURFACE-MOUNT FREQUENCY RANGE STEP SIZE MHz (KHz) 124SL OUTPUT POWER DC BIAS REQUIREMENTS Vcc1 & 2 (Volts) CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec) 198 197 TYPICAL PHASE NOISE dBc/Hz Offset at 10 KHz/100 KHz
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124slkhz/100-20oclmx2320+2lmx2325spll121sa
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SPLL950SB
Abstract: SPLL-12
Contextual Info: INTEGRATED FREQUENCY SYNTHESIZERS S um fac e-M o u n t 190 124S FREQUENCY RANGE DC BIAS REQUIREMENTS STEP SIZE Vcc1 8c 2 Volts OUTPUT POWER CURRENT Max. (mA) 198 197 SETTLING TIME dBm Tolerance (dB) (mSec) TYPICAL PHASE NOISE dBc/Hz Offset at 10 KHz/100 KHz
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khz/100spll950sbspll-12 |
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SPLL121SA
Contextual Info: Click Package To View Outline Drawing INTEGRATED FREQUENCY FREQUENCY INTEGRATED SYNTHESIZERS SYNTHESIZERS 124SL FREQUENCY RANGE MHz DC BIAS REQUIREMENTS STEP SIZE (KHz) Vcc1 & 2 (Volts) OUTPUT POWER CURRENT Max. (mA) dBm SETTLING TIME Tolerance (dB) (mSec)
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124slkhz/100lmx2320lmx2325+2lmx2332aspll121sa
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