SPI MICROPROCESSOR Search Results

JTAG MODULE SPI

Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Contextual Info: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

IDT88P8344

Abstract: 88P8344
Contextual Info: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

TSX 07 software

Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Contextual Info: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA

TSOP 48 thermal resistance type1

Abstract: IDT88P8342 drw22
Contextual Info: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

Contextual Info: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

spi FIFO

Abstract: IDT88P8344 DSC-6370
Contextual Info: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

spi on parallel port

Abstract: IDT88P8342
Contextual Info: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

Contextual Info: ispLever CORE TM Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide October 2005 ipug29_02.0 Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide Lattice Semiconductor Introduction Lattice’s Quad SPI-3 System Packet Interface Level 3 to SPI-4 (System Packet Interface Level 4) Bridge is an IP

lps 256

Contextual Info: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 To request the full IDT88P8341 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

0123F POWER SUPPLY

Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Contextual Info: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G

NII51011-7

Contextual Info: 9. SPI Core NII51011-7.1.0 Core Overview SPI is an industry-standard serial protocol commonly used in embedded systems to connect microprocessors to a variety of off-chip sensor, conversion, memory, and control devices. The SPI core with Avalon interface implements the SPI protocol and provides an Avalon MemoryMapped Avalon-MM interface on the back end.

Contextual Info: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 To request the full IDT88P8344 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

Contextual Info: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 To request the full IDT88P8342 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

sck 082

Abstract: AN802 APP802 MAX5154 MAX7651 MAX7652 CAN protocol basics mosi CS 8-02
Contextual Info: Maxim > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS INTERFACE CIRCUITS Keywords: SPI, SPI interface, SCK, MOSI, MISO, CS, I/O ports, bit banging, SPI peripheral. Sep 17, 2001 APPLICATION NOTE 802 Interfacing SPI Peripherals to the MAX7651 Processor

graphic lcd module 320x240

Abstract: graphic lcd 320x240 module programming kent display 320X240 MSP430F1611 Kent Displays SPI14 monochromatic lcd Cholesteric Liquid Crystal JTAG MODULE SPI
Contextual Info: 320x240x5.7 SPI 1/4 VGA 320 x 240 Cholesteric Display Development Kit with SPI Compatible Interface Development Kit Product Description The 320x240 SPI Development Kit contains everything required to quickly evaluate the features and capabilities of the 320x240 SPI Cholesteric LCD

LatticeMico32

Contextual Info: LatticeMico SPI The LatticeMico serial peripheral interface SPI provides an industrystandard interface between a LatticeMico32 processor and off-chip peripherals, as shown in Figure 1. In master mode, the SPI can be configured to control communication with up to 32 off-chip SPI ports. In slave mode, the

RTC Real Time Clocks

Abstract: Real Time Clocks DS1306 RTC DS1306
Contextual Info: Application Note 502 Interfacing SPI Real Time Clocks With A Microcontroller www.dalsemi.com Dallas Semiconductor offers a variety of serial Real Time Clocks RTCs . A number of these use the Motorola SPI interface to communicate with a microprocessor. This application note is intended to help customers understand the basics of the SPI interface.

TN-200

Abstract: Rabbit 3000 M68HC11 TN200
Contextual Info: TN200 SPI Using the Rabbit Clocked Serial Ports The Serial Peripheral Interface SPI is a four-wire full-duplex synchronous serial data link that is implemented in many microcontrollers and peripheral devices. The SPI was originally developed by Motorola to

MON08 schematic

Abstract: SPIGen SPIGen for parallel port MC68HC908JW32 MON08 spi to usb usb spi converter spi on parallel port USB to parallel
Contextual Info: Analog and Mixed-Signal Fact Sheet USB to SPI Interface Board Featuring the MC68HC908JW32 Overview Communications through the USB port USB to SPI Interface Block Diagram have become a standard feature on almost every new personal computer. The USB to SPI interface evaluation boards are

74ls139 decoder pin configuration

Abstract: SP74HCT139N 74LS139 SP74HCT139J 74LS139 pin configuration with
Contextual Info: SPI SP74HCT139 DECODER/DEMULTIPLEXER FEATURES • Designed for high performance memory decoders in microprocessor systems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with inverted outputs ■ Pin com patible with 74LS139 ■ SPI CMOS technology

TXC-06880

Abstract: TranSwitch txc-06880 ethernet chip switch GMII switch
Contextual Info: Envoy -CE2 Envoy™-CE4 SPI-3 to Ethernet Converters Product Brief Going from SPI-3 to Ethernet is uncomplicated and cost-effective TranSwitch’s Envoy-CE2 and Envoy-CE4 provide multiple Ethernet interfaces to a SPI-3 for connecting to a network processing unit, or

V2170

Abstract: 4E3C crystal 24mhz
Contextual Info: XR20V2170 I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER JUNE 2011 REV. 1.0.1 GENERAL DESCRIPTION FEATURES • Selectable I2C/SPI Interface • SPI clock frequency up to 18 MHz • Meets true EIA/TIA-232-F Standards from +2.97V The XR20V21701 V2170 is a high performance

wishbone

Abstract: spi flash controller
Contextual Info: LatticeMico SPI Flash Controller The LatticeMico Serial Peripheral Interface SPI flash controller is a WISHBONE slave device that provides an industry-standard interface between a central processing unit (CPU) and an off-chip SPI flash memory device. The controller has two separate WISHBONE slave ports: Port S and

74LS239

Abstract: SP74SC139F SP74SC139N
Contextual Info: SPI SP74SC239 DECODER/DEMULTIPLEXER PIN CONFIGURATION FEATURES • Designed for high performance decoders in microprocessor systems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with non-inverted outputs ■ Pin com patible with 74LS239 ■ SPI CM O S technology