SPD 223 Search Results
SPD 223 Price and Stock
API Delevan SPD62R-223MPower Inductors - SMD 22uH 20% .4ohm Shielded Choke SMT |
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SPD62R-223M | 11,574 |
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API Delevan SPD74R-223MPower Inductors - SMD 22uH 20% .11ohm Shielded Choke SMT |
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SPD74R-223M | 3,278 |
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API Delevan SPD127R-223MPower Inductors - SMD 22uH 20% .055ohm Shielded Choke SMT |
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SPD127R-223M | 500 |
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API Delevan HRSPD127-223MPower Inductors - SMD 22uH 20% SMT MIL-STD-202 |
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HRSPD127-223M | 246 |
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API Delevan HRSPD125-223MPower Inductors - SMD Surface Mount, Shielded Power Inductor, 22 uH, +/- 20% |
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HRSPD125-223M | 244 |
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SPD 223 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
25TAC
Abstract: HYMP512U64
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Original |
hymp512u648/hymp512u72128mx64128mx72+2 | |
CK2102
Abstract: DDR2-400 DDR2-533 HYMP512U64 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
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Original |
128mx64128mx72hymp512u648/hymp512u72+8 | |
C6248Contextual Info: SPD, Power Conditioning, PF Capacitors and Harmonic Filters Industrial Surge Protection Products 2.1 Surge Protection and Power Conditioning Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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cvx050/100hcue300ca08100004ev3-t2-77+1 | |
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Contextual Info: SERIES SPD 125 SPD125-332M SPD125-472M SPD125-103M SPD125-223M SPD125-473M SPD125-104M SPD125-224M SPD125-474M SPD125-684M SPD125-105M 3.3 4.7 10 22 47 100 220 470 680 1000 SPD127-103M SPD127-223M SPD127-473M SPD127-104M SPD127-224M SPD127-474M SPD127-684M |
OCR Scan |
spd125-332mspd125-472mspd125-103mspd125-223m+6 | |
PC2-5300
Abstract: DDR2-400 DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300
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Original |
64mx72hymp264r72240-pinpc2-5300+6 | |
PS 229Contextual Info: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Designated Pin Cap. Spec. Aug. 2004 Remark |
Original |
hymp532u6432mx64hymp532u646240-pin+1 | |
MO-237
Abstract: DDR2-400 DDR2-533 DDR2-667 PC2-3200 PC2-4300 PC2-5300
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Original |
128mx72hymp512r72240-pinmo-237+6 | |
DDR2-400
Abstract: DDR2-533 DDR2-667 MO-237 PC2-3200 PC2-4300 PC2-5300
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Original |
64mx72hymp264r72240-pinddr2-400+6 | |
GMM26416233
Abstract: GMM26416233CNTG
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OCR Scan |
pc1007k/7j/10kgmm26416233cntg64bits+1 | |
DDR2-400
Abstract: DDR2-533 MO-237 PC2-3200 PC2-4300 HYmp564u64p8
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Original |
64mx6464mx72hymp564u64p8/hymp564u72p8hymp564u64+7 | |
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Contextual Info: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. History Draft Date 0.1 Initial Release Mar. 2004 0.2 Corrected IDD Spec. & SPD typo (byte #22,#30) May. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
256mx72hymp125r72240-pin | |
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Contextual Info: 32Mx64 bits Unbuffered DDR2 SDRAM DIMM HYMP532U64 L 6 Revision History No. 0.1 History Draft Date Defined Target Spec. Mar. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
32mx64hymp532u64hymp532u646240-pin+1 | |
A1000
Abstract: A1001 A1051 A1052 A1053 A1054 A1101 A1103 HC12 a2305
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Original |
hc05/hc08mcuezdbg0508/da1000a1001+8 | |
a2305
Abstract: a1001 c133 A13007 CI 7433 A2306 a2333 a13001 A1000 touch-tone decoder A1052
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Original |
hc05/hc08mcuezdbg0508/da2305a1001 c133+8 | |
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Contextual Info: 32Mx64 bits Unbuffered DDR2 SDRAM Lead-Free DIMM HYMP532U64 L P6 Revision History No. 0.1 History Draft Date Defined Target Spec. Apr. 2004 1) Corrected Pin assignment table & 2) Corrected SPD typo(Byte #31) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
32mx64hymp532u64hymp532u646240-pin | |
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Contextual Info: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo. Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
64mx72hymp264r72240-pin | |
HY5PS1G421
Abstract: DDR2-400 DDR2-533 PC2-3200 PC2-4300 RA13 M4C5 M4C5 1
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Original |
256mx72hymp125r72240-pinhy5ps1g421+7 | |
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Contextual Info: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 Revision History No. History Draft Date 0.1 Defined Target Spec. Jan. 2004 0.2 1 Added Pin Capacitance Spec. , 2) Corrected typos of SPD Byte # 22,40,41,63 Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
64mx6464mx72hymp564u648/hymp564u728hymp564u64+1 | |
dm0165
Abstract: HYMP564U64 DDR2-400 DDR2-533 MO-237 PC2-3200 PC2-4300 DDR2 DIMM 240 pin names
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Original |
64mx6464mx72hymp564u648/hymp564u728hymp564u64+8 | |
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Contextual Info: 256Mx72 bits DDR2 SDRAM Registered DIMM HYMP125R72 L M4 Revision History No. 0.1 0.2 History Draft Date Initial Release Mar. 2004 Corrected IDD Spec. May. 2004 Corrected Pin assignment table & SPD typo(#42) July 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
256mx72hymp125r72240-pin | |
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Contextual Info: 64Mx72 bits DDR2 SDRAM Registered DIMM HYMP264R72 L 8 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(Bye #22) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
64mx72hymp264r72240-pin | |
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Contextual Info: 128Mx64 / 128Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP512U64 L 8/HYMP512U72(L)8 Revision History No. History Draft Date 0.1 Defined Target Spec. Mar. 2004 0.2 1) Added Pin Capacitance Spec., 2) Corrected a typo of SPD byte #41(tRC) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
128mx64128mx72hymp512u648/hymp512u72+1 | |
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Contextual Info: 128Mx72 bits DDR2 SDRAM Registered DIMM HYMP512R72 L 4 Revision History No. History Draft Date 0.1 1) Defined Target Spec. Feb. 2004 0.2 1) Added Pin Capacitance Spec. & IDD Spec. 2) Corrected SPD typo(byte #22,#42) Apr. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any |
Original |
128mx72hymp512r72240-pin | |
DDR2-400
Abstract: DDR2-533 HYMP532U648 MO-237 PC2-3200 PC2-4300
|
Original |
32mx64hymp532u64hymp532u646240-pin+6 | |