SP2996B Search Results

Voltage Regulator 2A

Abstract: SP2996 SP2996B
Contextual Info: Design Solution 2 SP2996 DDR Termination Circuit Using Ceramic Capacitors Date: January 2, 2006 Designed by: Mark Boermeester mboermeester@sipex.com Part Number: SP2996B Application Description: Linear regulator for DDR memory termination Electrical Requirements:

SP2996B

Abstract: 470uF 25V TANT REGULATOR 2A SP2996BEN CES7002A
Contextual Info: SP2996B 2 Amp DDR Bus Termination Regulator FEATURES • Capable of sourcing and sinking 2A Continuous current ■ Supports both DDR1 1.25VTT and DDR2 (0.9VTT) requirements ■ Low Output Voltage Offset, + 20mV ■ Thermal and Current Limit Protection ■ Integrated Power MOSFETs

Contextual Info: Preliminary SP2996B 2A Bus Termination Regulator VIN 1 FEATURES • Capable of sourcing and sinking 2A Continuous current ■ Supports both DDR1 1.25VTT and DDR2 (0.9VTT) requirements ■ Low Output Voltage Offset, + 20mV ■ Thermal and Current Limit Protection

DIODE MARKING GU

Abstract: SP2996B splitter DDR1 termination
Contextual Info: SP2996B 2 Amp DDR Bus Termination Regulator September 2010 Rev. 2.0.0 GENERAL DESCRIPTION APPLICATIONS The SP2996B voltage regulator is designed to convert voltage supplies ranging from 1.6V to 6V into a desired output voltage which is adjusted by an external resistor divider.

Contextual Info: PRODUCT CHANGE NOTICE PCN PART NUMBER(S): PCN No.: 10-0309-01 SP2996BEN-L, SP2996BEN-L/TR DATE: March 23, 2010 PART DESCRIPTION: See www.exar.com LEVEL OF CHANGE: [ ] Level I, Customer Approval. [X] Level II, Customer Information. PRODUCT ATTRIBUTE AFFECTED:

jedec MS-012-AA

Abstract: SP2996BEN CES7002A SP2996B
Contextual Info: Advanced SP2996B 2A Bus Termination Regulator VIN 1 FEATURES • Capable of sourcing and sinking 2A Continuous current ■ Supports both DDR1 1.25VTT and DDR2 (0.9VTT) requirements ■ Low Output Voltage Offset, + 20mV ■ Thermal and Current Limit Protection

ITT RZ2

Abstract: JESD8-15a Ras 1210 FDS6375 DDR2 SSTL class 470uF 25V TANT FDS7088N3 MSOP-10 SD101AWS SP2996
Contextual Info: Solved by APPLICATION NOTE TM Low Cost, High Performance DDR Termination Using SP2996B Introduction Double Data Rate DDR SDRAM is finding its way into more and more consumer appliances, in addition to its traditional market of PCs and servers. This has led to lower cost requirements for

JESD8-15a

Abstract: ITT RZ2 SP2996 SP2996B CES7002A SP2996BEN TRANSISTOR HANDLING 2A
Contextual Info: SP2996B 2 Amp DDR Bus Termination Regulator FEATURES • Capable of sourcing and sinking 2A Continuous current ■ Supports both DDR1 1.25VTT and DDR2 (0.9VTT) requirements ■ Low Output Voltage Offset, + 20mV ■ Thermal and Current Limit Protection ■ Integrated Power MOSFETs

6142E

Abstract: elektronik DDR SP2996B XRP6142EL0-5-F FDS6570
Contextual Info: X RP 6 1 4 2 Synchronous Step-Down Controller with DDR Memory Termination March 2010 Rev. 1.0.0 GENERAL DESCRIPTION APPLICATIONS The XRP6142 is a synchronous step down switching controller for over 15 Amps point-ofloads converters and optimized to generate

circuit diagram of ddr ram

Abstract: sp2996b
Contextual Info: X RP 2 9 9 7 2A DDR I/II/III Bus Termination Regulator July 2011 Rev. 1.0.0 GENERAL DESCRIPTION APPLICATIONS The XRP2997 is a Double Data Rate DDR termination voltage regulator supporting all power requirements of DDR I, II and III memories and is capable of sinking or sourcing

1A145-016V-001RG\TR

Abstract: 1N478A.TR RB070M-30 TR SP6654 SP208EH SP26LV432 SP26LV431 SPX29152
Contextual Info: February 28, 2007 Dear Valued Exar Customer: The purpose of this letter is to formally announce Exar’s plan to obsolete products which have had little to zero demand over the last 24 months. Attached you will find two lists: List 1 – includes those devices that we have been supplying in either traditional tin/lead or lead-free lead

circuit diagram of ddr ram

Abstract: XRP2997 free circuit diagram of ddr3 ram
Contextual Info: XRP2997 2A DDR I/II/III Bus Termination Regulator October 2012 Rev. 1.2.0 GENERAL DESCRIPTION APPLICATIONS The XRP2997 is a Double Data Rate DDR termination voltage regulator supporting all power requirements of DDR I, II and III memories and is capable of sinking or sourcing

circuit diagram of ddr ram

Abstract: free circuit diagram of ddr3 ram
Contextual Info: XRP2997 2A DDR I/II/III Bus Termination Regulator March 2012 Rev. 1.1.1 GENERAL DESCRIPTION APPLICATIONS The XRP2997 is a Double Data Rate DDR termination voltage regulator supporting all power requirements of DDR I, II and III memories and is capable of sinking or sourcing

SP809EK-L-2-6

Abstract: SP809NEK-L-2-9 SP2526A-2EN-L SP809EK-L-4-6 sp2996b SP809EK-L-2-6/TR SP2525A-1EN-L SP2525A-2EN-L SP2526A-1EN-L
Contextual Info: PRODUCT CHANGE NOTICE PCN PART NUMBER(S): PCN No.: 09-1007-01 Refer to Attachment A DATE: October 21, 2009 PART DESCRIPTION: Refer to www.exar.com LEVEL OF CHANGE: [ ] Level I, Customer Approval. [ X ] Level II, Customer Information. PRODUCT ATTRIBUTE AFFECTED: