SOT762 Search Results

Contextual Info: SOT762-1 Standard product orientation 12NC ending 115 Rev. 03 — 28 July 2011 Packing information 1. Packing method Fig. 1 Package version 12NC ending Reel dimensions d x w mm SPQ/PQ (pcs) Reels per box Outer box dimensions l x w x h (mm) SOT762-1 115 180 x 12

dhvqfn14

Abstract: MO-241 sot762 SOT762-1
Contextual Info: PDF: 2003 Jan 28 Philips Semiconductors Package outline DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1

SOT762-1

Abstract: sot762
Contextual Info: SOT762-1 Standard product orientation 12NC ending 115 Rev. 01 — 13 February 2009 Packing information 1. Packing method Fig. 1 Package version 12NC ending Reel dimensions d x w mm SPQ/PQ (pcs) Reels per box Outer box dimensions l x w x h (mm) SOT762-1 115

Contextual Info: PC board footprint NXP Semiconductors Footprint information for reflow soldering of DHVQFN14 package SOT762-1 Hx Gx D P C 0.105 SPx nSPx Hy SPy tot SPy Gy SLy nSPy By Ay SPx tot SLx Bx Ax Generic footprint pattern Refer to the package outline drawing for actual layout

Contextual Info: Package outline DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A E A1 c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B

AHCT32

Abstract: 74AHC32 74AHC32BQ 74AHC32D 74AHC32PW 74AHCT32 TSSOP14
Contextual Info: 74AHC32; 74AHCT32 Quad 2-input OR gate Rev. 04 — 22 May 2008 Product data sheet 1. General description The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

2A5-10

Abstract: 74AHC02BQ 74AHC02 74AHC02D 74AHC02PW 74AHCT02 TSSOP14
Contextual Info: 74AHC02; 74AHCT02 Quad 2-input NOR gate Rev. 04 — 21 May 2008 Product data sheet 1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74HC27

Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.

AHCT00

Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
Contextual Info: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC

dhvqfn14

Abstract: 74HC32 74HCT32 74LV32 74LV32D 74LV32DB 74LV32N 74LV32PW JESD22-A114E
Contextual Info: 74LV32 Quad 2-input OR gate Rev. 03 — 9 November 2007 Product data sheet 1. General description The 74LV32 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32. The 74LV32 provides a quad 2-input OR function. 2. Features

dhvqfn14 footprint

Abstract: 74AHC14 74AHCT14 sot762 footprint 74AHC14-74AHCT14 74AHC 74AHC14D 74AHC14PW 74AHCT 74AHCT14D
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74AHC14; 74AHCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1999 Sep 27 2003 May 26 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 FEATURES DESCRIPTION

dhvqfn14 footprint

Abstract: 74ALVC00 74ALVC00BQ 74ALVC00D 74ALVC00PW DHVQFN14 TSSOP14 sot762 footprint SOT762-1 AN01026
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC00 Quad 2-input NAND gate Product specification Supersedes data of 2003 Feb 06 2003 May 14 Philips Semiconductors Product specification Quad 2-input NAND gate 74ALVC00 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V

MDB105

Abstract: sot762 footprint MNA423 74ALVC74 74ALVC74BQ 74ALVC74D 74ALVC74PW DHVQFN14 TSSOP14 2SD92
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2003 Jan 24 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;

74HC164N PIN DIAGRAM

Abstract: 74hc164n 74HCT164 application note 74HC164 74HCT164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB
Contextual Info: 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with JEDEC

Contextual Info: 74HC393-Q100; 74HCT393-Q100 Dual 4-bit binary ripple counter Rev. 1 — 19 June 2014 Product data sheet 1. General description The 74HC393-Q100; 7474HCT393-Q100 is a dual 4-stage binary ripple counter. Each counter features a clock input nCP , an overriding asynchronous master reset input

Contextual Info: 74ALVC32-Q100 Quad 2-input OR gate Rev. 1 — 16 May 2014 Product data sheet 1. General description The 74ALVC32-Q100 is a quad 2-input OR gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This product has been qualified to the Automotive Electronics Council AEC standard

Contextual Info: 74LVC126A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Rev. 8 — 8 April 2014 Product data sheet 1. General description The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input nOE . A LOW at nOE causes the outputs

74HC14 oscillator application note

Abstract: 74HC14 74HC14 oscillator application diagram 74HC14 application note 74HC14 so14 74HC14 DIP14 74HCT14 74hc14 philips 74hc14n equivalent 74HCT14N PHILIPS
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC14; 74HCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1997 Aug 26 2003 Oct 30 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74HC14; 74HCT14 FEATURES DESCRIPTION • Applications:

dhvqfn14

Abstract: 74AHC30 74AHC30D 74AHC30PW 74AHCT30 74AHCT30D 74AHCT30PW JESD22-A114E
Contextual Info: 74AHC30; 74AHCT30 8-input NAND gate Rev. 03 — 26 June 2009 Product data sheet 1. General description The 74AHC30; 74AHCT30 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74VHC125

Abstract: 74VHC126 74VHCT125 JESD22-A114E
Contextual Info: 74VHC126; 74VHCT126 Quad buffer/line driver; 3-state Rev. 01 — 13 August 2009 Product data sheet 1. General description The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

74LVC14A-Q100

Contextual Info: 74LVC14A-Q100 Hex inverting Schmitt trigger with 5 V tolerant input Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC14A-Q100 provides six inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output

Contextual Info: 74CBTLV3126 4-bit bus switch Rev. 3 — 15 December 2011 Product data sheet 1. General description The 74CBTLV3126 provides a 4-bit high-speed bus switch with separate output enable inputs 1OE to 4OE . The low on-state resistance of the switch allows connections to be

74HC30

Contextual Info: 74HC30; 74HCT30 8-input NAND gate Rev. 03 — 20 April 2010 Product data sheet 1. General description The 74HC30; 74HCT30 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: 74LVCU04A Hex inverter Rev. 7 — 17 November 2011 Product data sheet 1. General description The 74LVCU04A is a general purpose hex inverter. Each of the six inverters is a single stage with unbuffered outputs. 2. Features and benefits     