SOT353 G1 Search Results
SOT353 G1 Datasheets Context Search
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Contextual Info: A Product Line of Diodes Incorporated ZXRE160 0.6V ENHANCED ADJUSTABLE PRECISION SHUNT REGULATOR Description Pin Assignments ZXRE160_H5 SC70/SOT353 and The ZXRE160 is a 5-terminal adjustable shunt regulator offering excellent temperature stability and output |
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ZXRE160 ZXRE160 SC70/SOT353) TSOT25) ZXRE060 DS35688 | |
ZXRE160A
Abstract: marking code R3 SOT353 DFN1520H4-6 transistor z 0607
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ZXRE160 ZXRE160 SC70/SOT353) TSOT25) ZXRE060 DS35688 ZXRE160A marking code R3 SOT353 DFN1520H4-6 transistor z 0607 | |
G1562
Abstract: Operational Amplifier
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G1562 30MHz G1562 30MHz. G1562TA1U 152Ax 152Bx TSOT-23-5 Operational Amplifier | |
Contextual Info: G1211 Global Mixed-mode Technology Inc. Rail-to-Rail I/O, High-Slew-Rate OP Amp Features General Description ̈ G1211 is a input/output rail-to-rail Operational Amplifier. It can be operated from +2.2V to +5.5V single supply or from ± 1.1V to ± 2.75 dual supply. G1211 can |
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G1211 G1211 OT-23-5 SC-70-5 OT-353) G1211TAUf | |
G1211
Abstract: Operational Amplifier
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G1211 G1211 OT-23-5 SC-70-5 OT-353) G1211TAUf Operational Amplifier | |
SSM3J307T
Abstract: SSM3J328R SSM3J334R
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200-mA BCE0030D SSM3J307T SSM3J328R SSM3J334R | |
SOT23 W1P
Abstract: MARKING W1P transistor w1P MARKING W2 SOT23 marking code R2 sot23 marking code w2 sot23 marking code W1p marking code P2p SOT23 marking W1 sot23 marking code w2 sot323
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BF547 BF547W BF747 BFC505 OT323 OT353 OT143 SOT23 W1P MARKING W1P transistor w1P MARKING W2 SOT23 marking code R2 sot23 marking code w2 sot23 marking code W1p marking code P2p SOT23 marking W1 sot23 marking code w2 sot323 | |
Contextual Info: 74LVC1G02 SINGLE 2 INPUT POSITIVE NOR GATE Description Pin Assignments Top View ( Top View ) The 74LVC1G02 is a single 2-input positive NOR gate with a standard push-pull output. The device is designed for operation with A 1 5 Vcc A 1 5 Vcc B 2 a power supply range of 1.65V to 5.5V. The inputs are tolerant to |
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74LVC1G02 74LVC1G02 OT553 OT353 DS32197 | |
Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The AUP1G09 is a single AND gate with an open drain output |
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74AUP1G09 AUP1G09 DS35151 | |
Contextual Info: 74AUP1G04 SINGLE INVERTER GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. Future Product The 74AUP1G04 is a single inverter gate with a standard push-pull |
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74AUP1G04 74AUP1G04 DS35147 | |
Contextual Info: 74AUP1G07 SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G07 is a single buffer gate with an open drain output |
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74AUP1G07 74AUP1G07 DS35149 | |
Contextual Info: 74LVC1G02 SINGLE 2 INPUT POSITIVE NOR GATE Description Pin Assignments Top View ( Top View ) The 74LVC1G02 is a single 2-input positive NOR gate with a standard push-pull output. The device is designed for operation with A 1 5 Vcc A 1 5 Vcc B 2 a power supply range of 1.65V to 5.5V. The inputs are tolerant to |
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74LVC1G02 74LVC1G02 OT553 OT353 DS32197 | |
Contextual Info: NXP analog switches NX3 & NX5 families Low power, low ohmic switches for analog and digital switching NXP offers best in class low RON analog switches that are suitable for a variety of analog and digital switching needs including audio, USB, power, video, data, camera signal switching, baseband data |
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mother board lcd tv block diagram
Abstract: KDS8L HC49SUB C0805 100nf 74HCT74T ic 293D c9 sot353 32KHZ768 W17 sot23 rca IC12
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SAA812X AN00061> TP97036 2/W97 SAA812X mother board lcd tv block diagram KDS8L HC49SUB C0805 100nf 74HCT74T ic 293D c9 sot353 32KHZ768 W17 sot23 rca IC12 | |
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Contextual Info: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3- Top View ( Top View ) state output. The output enters a high impedance state when a HIGH- A 2 for operation with a power supply range of 1.65V to 5.5V. The inputs |
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74LVC1G125 74LVC1G125 OT553 OT353 DS32202 | |
Contextual Info: 74AUP1G32 SINGLE 2 INPUT POSITIVE OR GATE Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G32 is a single 2-input positive OR gate with a standard |
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74AUP1G32 74AUP1G32 DS35154 | |
Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable ( Top View ) applications. ( Top View ) 5 Vcc |
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74AUP1G09 AUP1G09 X2-DFN0808-4 OT35nowledge DS35151 | |
Contextual Info: 74LVC1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description Pin Assignments Top View The 74LVC1G00 is a single 2-input positive NAND gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V |
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74LVC1G00 74LVC1G00 OT553 DS32196 | |
Contextual Info: 74LVC1G04 SINGLE INVERTER Description Pin Assignments Top View The 74LVC1G04 is a single inverter gate with a standard push-pull output. The device is designed for operation with a power supply ( Top View ) A 2 range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this |
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74LVC1G04 74LVC1G04 OT553 OT353 DS32198 | |
Contextual Info: 74LVC1G32 SINGLE 2 INPUT POSITIVE OR GATE Description Pin Assignments The 74LVC1G32 is a single 2-input positive OR gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing |
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74LVC1G32 74LVC1G32 DS32200 | |
Contextual Info: 74LVC1G04 SINGLE INVERTER Description Pin Assignments The 74LVC1G04 is a single inverter gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully |
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74LVC1G04 74LVC1G04 DS32198 | |
Contextual Info: 74AUP1G06 SINGLE INVERTER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G06 is a single inverter with an open drain output |
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74AUP1G06 74AUP1G06 DS35148 | |
Contextual Info: 74LVC1G06 SINGLE INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The 74LVC1G06 is a single inverter gate with an open drain output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The input is tolerant to 5.5V allowing this device to be |
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74LVC1G06 74LVC1G06 DS32272 | |
Contextual Info: 74LVC1G34 SINGLE BUFFER GATE Description Pin Assignments The 74LVC1G34 is a single buffer gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this |
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74LVC1G34 74LVC1G34 DS36108 |