SN74SSTU32864 Search Results
SN74SSTU32864 Result Highlights (1)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| SN74SSTU32864NMJR |
|
500-MHz, 25-bit configurable registered buffer with SSTL_18 inputs and outputs 96-NFBGA 0 to 70 |
|
SN74SSTU32864 Datasheets (24)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SN74SSTU32864 |
|
Original | 391.63KB | 18 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864 |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs | Original | 381.19KB | 17 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864C |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs | Original | 385.02KB | 17 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CGKER |
|
SN74SSTU32864 - IC SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA96, PLASTIC, LFBGA-96, FF/Latch | Original | 784.29KB | 19 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CGKER |
|
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL 18 INPUTS AND OUTPUTS | Original | 304.69KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CGKER |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 | Original | 478.23KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CZKER |
|
SN74SSTU32864 - 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 | Original | 784.29KB | 19 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CZKER |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs | Original | 304.76KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864CZKER |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 | Original | 478.23KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864D |
|
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS | Original | 355.22KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864D |
|
25-Bit Configurable Registered Buffer With SSTL_18 Inputs and Outputs | Original | 302.32KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864DGKER |
|
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS | Original | 355.22KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864DGKER |
|
25-Bit Configurable Registered Buffer With SSTL_18 Inputs and Outputs | Original | 302.32KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864DZKER |
|
25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS | Original | 355.22KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864DZKER |
|
25-Bit Configurable Registered Buffer With SSTL_18 Inputs and Outputs | Original | 302.32KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864E |
|
25-Bit Configurable Registered Buffer With SSTL18 Inputs and Outputs | Original | 218.03KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864EZKER |
|
25-Bit Configurable Registered Buffer With SSTL18 Inputs and Outputs 96-LFBGA 0 to 70 | Original | 393.65KB | 18 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864EZKER |
|
25-Bit Configurable Registered Buffer With SSTL18 Inputs and Outputs | Original | 218.03KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864GKER |
|
25 Bit Configurable Registered Buffer with SSTL-18 Inputs and Outputs | Original | 250.15KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| SN74SSTU32864GKER |
|
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 | Original | 567.88KB | 20 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
SN74SSTU32864 Price and Stock
Rochester Electronics LLC SN74SSTU32864GKERIC CONF REG BUF 25-14BIT 96LFBGA |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
SN74SSTU32864GKER | Bulk | 37 |
|
Buy Now | ||||||
Rochester Electronics LLC SN74SSTU32864ZKERIC CONFI REG BUF 25-14BIT 96PBGA |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
|
SN74SSTU32864ZKER | Bulk | 82 |
|
Buy Now | ||||||
Texas Instruments SN74SSTU32864ZKERIC CONFI REG BUF 25-14BIT 96PBGA |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
|
SN74SSTU32864ZKER | Reel |
|
Buy Now | |||||||
|
SN74SSTU32864ZKER | 4,000 | 85 |
|
Buy Now | ||||||
|
SN74SSTU32864ZKER | 285,710 | 1 |
|
Buy Now | ||||||
Texas Instruments SN74SSTU32864NMJRIC CONF REG BUF 25-14BIT 96NFBGA |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
|
SN74SSTU32864NMJR | Reel | 1,000 |
|
Buy Now | ||||||
|
SN74SSTU32864NMJR | 945 |
|
Buy Now | |||||||
Rochester Electronics LLC SN74SSTU32864DZKERIC CONFI REG BUF 25-14BIT 96PBGA |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
|
SN74SSTU32864DZKER | Bulk | 34 |
|
Buy Now | ||||||
SN74SSTU32864 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER TOP-SIDE MARKING H2 SU864D
|
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit A115-A C101 SN74SSTU32864D SN74SSTU32864DGKER TOP-SIDE MARKING H2 SU864D | |
|
Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit | |
|
Contextual Info: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit | |
|
Contextual Info: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit | |
|
Contextual Info: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit | |
|
Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer |
Original |
SN74SSTU32864 25-BIT SCES434 14-Bit | |
|
Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer |
Original |
SN74SSTU32864 25-BIT SCES434 14-Bit | |
A115-A
Abstract: C101 SN74SSTU32864E SN74SSTU32864EZKER
|
Original |
SN74SSTU32864E 25-BIT SCAS802 14-Bit A115-A C101 SN74SSTU32864E SN74SSTU32864EZKER | |
|
Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit | |
A115-A
Abstract: C101 SN74SSTU32864C SN74SSTU32864CGKER
|
Original |
SN74SSTU32864C 25-BIT SCES542A 14-Bit A115-A C101 SN74SSTU32864C SN74SSTU32864CGKER | |
dimm pcb layoutContextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer |
Original |
SN74SSTU32864 25-BIT SCES434 14-Bit SN74SSTU32864GKER SN74SSTU32864 SCEM343, dimm pcb layout | |
A115-A
Abstract: C101 SN74SSTU32864C SN74SSTU32864CGKER
|
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit A115-A C101 SN74SSTU32864C SN74SSTU32864CGKER | |
A115-A
Abstract: C101 SN74SSTU32864 SN74SSTU32864GKER
|
Original |
SN74SSTU32864 25-BIT SCES434 14-Bit A115-A C101 SN74SSTU32864 SN74SSTU32864GKER | |
|
Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit | |
|
|
|||
|
Contextual Info: SN74SSTU32864D 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES623A – FEBRUARY 2005 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit | |
|
Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit | |
|
Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit | |
A115-A
Abstract: C101 SN74SSTU32864C SN74SSTU32864CGKER
|
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit A115-A C101 SN74SSTU32864C SN74SSTU32864CGKER | |
DDR2 sdram pcb layout guidelines
Abstract: DDR2 SDRAM with SSTL_18 interface SSTL18
|
Original |
SN74SSTU32864E 25-BIT SCAS802 14-Bit DDR2 sdram pcb layout guidelines DDR2 SDRAM with SSTL_18 interface SSTL18 | |
SSTL-18Contextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit SSTL-18 | |
|
Contextual Info: SN74SSTU32864E 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCAS802 – JULY 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 |
Original |
SN74SSTU32864E 25-BIT SCAS802 14-Bit | |
S864CContextual Info: SN74SSTU32864C 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS www.ti.com SCES542B – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR2 DIMM PCB Layout |
Original |
SN74SSTU32864C 25-BIT SCES542B 14-Bit S864C | |
D8-D25Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer |
Original |
SN74SSTU32864 25-BIT SCES434 14-Bit D8-D25 | |
A115-A
Abstract: C101 SN74SSTU32864D SN74SSTU32864DGKER SSTL-18
|
Original |
SN74SSTU32864D 25-BIT SCES623A 14-Bit A115-A C101 SN74SSTU32864D SN74SSTU32864DGKER SSTL-18 | |